{"id":"https://openalex.org/W2153915509","doi":"https://doi.org/10.1109/fpt.2004.1393259","title":"A novel CLB architecture to detect and correct SEU in LUTs of SRAM-based FPGAs","display_name":"A novel CLB architecture to detect and correct SEU in LUTs of SRAM-based FPGAs","publication_year":2005,"publication_date":"2005-03-21","ids":{"openalex":"https://openalex.org/W2153915509","doi":"https://doi.org/10.1109/fpt.2004.1393259","mag":"2153915509"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2004.1393259","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2004.1393259","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068587667","display_name":"E.S. Sundar","orcid":null},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"E.S. Sundar","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology, Madras, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology, Madras, India","institution_ids":["https://openalex.org/I24676775"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055837802","display_name":"Vikram Chandrasekhar","orcid":"https://orcid.org/0000-0002-3890-4895"},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"V. Chandrasekhar","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology, Madras, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology, Madras, India","institution_ids":["https://openalex.org/I24676775"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084744415","display_name":"M. Sashikanth","orcid":null},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M. Sashikanth","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology, Madras, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology, Madras, India","institution_ids":["https://openalex.org/I24676775"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010004459","display_name":"V. Kamakoti","orcid":null},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"V. Kamakoti","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology, Madras, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology, Madras, India","institution_ids":["https://openalex.org/I24676775"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051232628","display_name":"Vijay Narayanan","orcid":"https://orcid.org/0009-0008-8433-963X"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"V. Narayanan","raw_affiliation_strings":["Department of Computer Science and Engineering, Pennsylvania State University, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Pennsylvania State University, USA","institution_ids":["https://openalex.org/I130769515"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5068587667"],"corresponding_institution_ids":["https://openalex.org/I24676775"],"apc_list":null,"apc_paid":null,"fwci":2.4898,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.89612937,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"121","last_page":"128"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7661623954772949},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.7308175563812256},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7043954730033875},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6030226349830627},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.5962060689926147},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5677170753479004},{"id":"https://openalex.org/keywords/single-event-upset","display_name":"Single event upset","score":0.5234008431434631},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.5180845260620117},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.513163149356842},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.465471476316452},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.41581594944000244},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.341228723526001},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3164786100387573},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10841521620750427},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09199652075767517},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.06957292556762695}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7661623954772949},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.7308175563812256},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7043954730033875},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6030226349830627},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.5962060689926147},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5677170753479004},{"id":"https://openalex.org/C2780073065","wikidata":"https://www.wikidata.org/wiki/Q1476733","display_name":"Single event upset","level":3,"score":0.5234008431434631},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.5180845260620117},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.513163149356842},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.465471476316452},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.41581594944000244},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.341228723526001},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3164786100387573},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10841521620750427},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09199652075767517},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.06957292556762695},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpt.2004.1393259","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2004.1393259","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/11","score":0.47999998927116394,"display_name":"Sustainable cities and communities"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W37550339","https://openalex.org/W155940324","https://openalex.org/W1504339380","https://openalex.org/W1658665017","https://openalex.org/W1985238821","https://openalex.org/W2100313702","https://openalex.org/W2101150879","https://openalex.org/W2116097016","https://openalex.org/W2119901643","https://openalex.org/W2153254331","https://openalex.org/W2587770604","https://openalex.org/W3194602862","https://openalex.org/W4229525459","https://openalex.org/W4229966209","https://openalex.org/W6606353889","https://openalex.org/W6630010957","https://openalex.org/W6637146878","https://openalex.org/W6682335116"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W4249632163","https://openalex.org/W1760305469","https://openalex.org/W2797161794","https://openalex.org/W2073075351","https://openalex.org/W2096938998"],"abstract_inverted_index":{"This":[0],"work":[1],"proposes":[2],"a":[3],"new":[4],"CLB":[5,40],"architecture":[6,41,63],"for":[7,24,105,116],"FPGAs":[8],"that":[9,33,65,94,108],"can":[10,76,102,130],"detect":[11,43],"and":[12,44,115],"correct":[13,45],"single":[14],"event":[15],"upset":[16],"(SEU)":[17],"faults":[18,48],"in":[19,49,73,99,127],"the":[20,29,35,38,46,50,61,71,74,97,100,112,117,125,128],"LUTs.":[21,51],"A":[22],"methodology":[23],"mapping":[25,56],"logical":[26],"functions":[27],"onto":[28],"LUTs":[30,75,101,129],"is":[31,92,109],"presented":[32],"exploits":[34],"features":[36],"of":[37,70,96,124],"proposed":[39,62,113],"to":[42],"SEU":[47,72,98,126],"Experimental":[52],"results":[53],"obtained":[54],"by":[55,84],"standard":[57],"benchmark":[58,118],"circuits":[59],"on":[60,66,111,120],"indicate":[64],"an":[67,121],"average,":[68,122],"96%":[69,123],"be":[77,103,131],"detected":[78,104],"without":[79],"employing":[80],"any":[81,106,134],"redundancy.":[82],"Further,":[83],"using":[85],"duplication":[86],"with":[87],"comparison":[88],"(DWC)":[89],"techniques":[90],"it":[91],"shown":[93],"100%":[95],"circuit":[107],"mapped":[110],"architecture;":[114],"circuits,":[119],"automatically":[132],"(without":[133],"user":[135],"intervention":[136],"or":[137],"reconfiguration)":[138],"corrected.":[139]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}