{"id":"https://openalex.org/W2897248604","doi":"https://doi.org/10.1109/essderc.2018.8486848","title":"A Compact Model for Static and Dynamic Operation of Symmetric Double-Gate Junction FETs","display_name":"A Compact Model for Static and Dynamic Operation of Symmetric Double-Gate Junction FETs","publication_year":2018,"publication_date":"2018-09-01","ids":{"openalex":"https://openalex.org/W2897248604","doi":"https://doi.org/10.1109/essderc.2018.8486848","mag":"2897248604"},"language":"en","primary_location":{"id":"doi:10.1109/essderc.2018.8486848","is_oa":false,"landing_page_url":"https://doi.org/10.1109/essderc.2018.8486848","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 48th European Solid-State Device Research Conference (ESSDERC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046231838","display_name":"Nikolaos Makris","orcid":"https://orcid.org/0000-0002-5707-4073"},"institutions":[{"id":"https://openalex.org/I55741626","display_name":"Technical University of Crete","ror":"https://ror.org/03f8bz564","country_code":"GR","type":"education","lineage":["https://openalex.org/I55741626"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Nikolaos Makris","raw_affiliation_strings":["School of Electrical & Computer Engineering, Technical University of Crete, Chania, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical & Computer Engineering, Technical University of Crete, Chania, Greece","institution_ids":["https://openalex.org/I55741626"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050096507","display_name":"Matthias Bucher","orcid":"https://orcid.org/0000-0002-2584-2533"},"institutions":[{"id":"https://openalex.org/I55741626","display_name":"Technical University of Crete","ror":"https://ror.org/03f8bz564","country_code":"GR","type":"education","lineage":["https://openalex.org/I55741626"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Matthias Bucher","raw_affiliation_strings":["School of Electrical & Computer Engineering, Technical University of Crete, Chania, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical & Computer Engineering, Technical University of Crete, Chania, Greece","institution_ids":["https://openalex.org/I55741626"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012272878","display_name":"Farzan Jazaeri","orcid":"https://orcid.org/0000-0001-9649-3572"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Farzan Jazaeri","raw_affiliation_strings":["Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, School of Engineering, Lausanne, Switzerland"],"affiliations":[{"raw_affiliation_string":"Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, School of Engineering, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060693851","display_name":"Jean-Michel Sall\u00e8se","orcid":"https://orcid.org/0000-0003-2109-909X"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Jean-Michel Sallese","raw_affiliation_strings":["Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, School of Engineering, Lausanne, Switzerland"],"affiliations":[{"raw_affiliation_string":"Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne, School of Engineering, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5046231838"],"corresponding_institution_ids":["https://openalex.org/I55741626"],"apc_list":null,"apc_paid":null,"fwci":0.9013,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.76506429,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"238","last_page":"241"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10361","display_name":"Silicon Carbide Semiconductor Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.5489112734794617},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.48328378796577454},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4483731985092163},{"id":"https://openalex.org/keywords/double-gate","display_name":"Double gate","score":0.44763973355293274},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.38406941294670105},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.365268737077713},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.34329959750175476},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.22735774517059326},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21745631098747253},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.21705326437950134},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11422955989837646}],"concepts":[{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.5489112734794617},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.48328378796577454},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4483731985092163},{"id":"https://openalex.org/C3019885731","wikidata":"https://www.wikidata.org/wiki/Q48087455","display_name":"Double gate","level":5,"score":0.44763973355293274},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.38406941294670105},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.365268737077713},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.34329959750175476},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.22735774517059326},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21745631098747253},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.21705326437950134},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11422955989837646}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/essderc.2018.8486848","is_oa":false,"landing_page_url":"https://doi.org/10.1109/essderc.2018.8486848","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 48th European Solid-State Device Research Conference (ESSDERC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5299999713897705,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1580024056","https://openalex.org/W1981023368","https://openalex.org/W1998432998","https://openalex.org/W2026803795","https://openalex.org/W2034511262","https://openalex.org/W2057301171","https://openalex.org/W2060425144","https://openalex.org/W2068945108","https://openalex.org/W2093785960","https://openalex.org/W2101678578","https://openalex.org/W2114750951","https://openalex.org/W2142776895","https://openalex.org/W2146524171","https://openalex.org/W2169030782","https://openalex.org/W2305072093","https://openalex.org/W2469112583","https://openalex.org/W2498970880","https://openalex.org/W2765568454","https://openalex.org/W2806306573","https://openalex.org/W2806965700"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2899084033","https://openalex.org/W2902546961","https://openalex.org/W2292675962","https://openalex.org/W3127524829","https://openalex.org/W2121524308","https://openalex.org/W1993889649","https://openalex.org/W2460230608","https://openalex.org/W2144387193","https://openalex.org/W2128892094"],"abstract_inverted_index":{"The":[0,22,35,62,80],"present":[1],"work":[2],"describes":[3],"a":[4],"novel":[5],"charge-based":[6],"compact":[7],"model":[8,23,36,63,81],"of":[9,32,40,43,55],"the":[10,33,44,56],"symmetric":[11],"double-gate":[12],"junction":[13],"field":[14],"effect":[15],"transistor":[16],"(DG":[17],"JFET)":[18],"for":[19],"circuit":[20,86],"simulation.":[21],"is":[24,64,82],"physics-based":[25],"and":[26,29,52,58],"addresses":[27],"static":[28],"capacitive":[30],"behavior":[31],"JFET.":[34],"covers":[37],"all":[38],"regions":[39],"device":[41],"operation":[42],"depletion":[45],"mode":[46],"JFET,":[47],"relies":[48],"only":[49],"on":[50],"physical":[51],"electrical":[53],"parameters":[54],"device,":[57],"includes":[59],"short-channel":[60],"effects.":[61],"validated":[65],"with":[66,74],"respect":[67,75],"to":[68,76],"TCAD":[69],"simulation":[70],"as":[71,73],"well":[72],"measurements":[77],"from":[78],"JFETs.":[79],"implemented":[83],"in":[84],"SPICE":[85],"simulators":[87],"using":[88],"Verilog-A":[89],"based":[90],"code.":[91]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
