{"id":"https://openalex.org/W2899328288","doi":"https://doi.org/10.1109/esscirc.2018.8494254","title":"Clock Synchronous Reset and Skew Calibration of 65GS/s ADCs in A Multi-Lane Coherent Receiver","display_name":"Clock Synchronous Reset and Skew Calibration of 65GS/s ADCs in A Multi-Lane Coherent Receiver","publication_year":2018,"publication_date":"2018-09-01","ids":{"openalex":"https://openalex.org/W2899328288","doi":"https://doi.org/10.1109/esscirc.2018.8494254","mag":"2899328288"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2018.8494254","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2018.8494254","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064400460","display_name":"Shankarram Athreya","orcid":null},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Shankarram Athreya","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088641089","display_name":"Hiva Hedayati","orcid":null},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hiva Hedayati","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019322118","display_name":"Shayan Kazemkhani","orcid":null},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shayan Kazemkhani","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100658756","display_name":"Yanfei Chen","orcid":"https://orcid.org/0000-0003-0944-222X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yanfei Chen","raw_affiliation_strings":["Intel Corporation, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042101370","display_name":"Saurabh Vats","orcid":null},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saurabh Vats","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066125717","display_name":"Michael D. Scott","orcid":"https://orcid.org/0000-0003-2260-916X"},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael D. Scott","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062361284","display_name":"B.R. Zeydel","orcid":null},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bart Zeydel","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103194919","display_name":"P. Keller","orcid":"https://orcid.org/0000-0003-2736-3357"},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peter Keller","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100370334","display_name":"Jian Wang","orcid":"https://orcid.org/0000-0001-5433-117X"},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jian Wang","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016766242","display_name":"Bhaskarareddy Avula","orcid":null},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bhaskarareddy Avula","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029806914","display_name":"Boris Murmann","orcid":"https://orcid.org/0000-0003-3417-8782"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Boris Murmann","raw_affiliation_strings":["Stanford University, CA, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042677779","display_name":"Echere Iroaga","orcid":null},"institutions":[{"id":"https://openalex.org/I1328728281","display_name":"MACOM (United States)","ror":"https://ror.org/04wf6rg14","country_code":"US","type":"company","lineage":["https://openalex.org/I1328728281"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Echere Iroaga","raw_affiliation_strings":["MACOM Technology Solutions, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"MACOM Technology Solutions, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1328728281"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":12,"corresponding_author_ids":["https://openalex.org/A5064400460"],"corresponding_institution_ids":["https://openalex.org/I1328728281"],"apc_list":null,"apc_paid":null,"fwci":0.109,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.45962527,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"250","last_page":"253"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.7654380798339844},{"id":"https://openalex.org/keywords/reset","display_name":"Reset (finance)","score":0.7134866118431091},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.6733999252319336},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6319308280944824},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.6130936145782471},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5530805587768555},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.5356663465499878},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.5346037149429321},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.5271603465080261},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.5207826495170593},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4968462288379669},{"id":"https://openalex.org/keywords/serialization","display_name":"Serialization","score":0.460018128156662},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.45033836364746094},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42294052243232727},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.4121285080909729},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.38300424814224243},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.28794124722480774},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19898721575737},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.16866323351860046},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.13381406664848328},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13009348511695862},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.08896327018737793}],"concepts":[{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.7654380798339844},{"id":"https://openalex.org/C2779795794","wikidata":"https://www.wikidata.org/wiki/Q7315343","display_name":"Reset (finance)","level":2,"score":0.7134866118431091},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.6733999252319336},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6319308280944824},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.6130936145782471},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5530805587768555},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.5356663465499878},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.5346037149429321},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.5271603465080261},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.5207826495170593},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4968462288379669},{"id":"https://openalex.org/C52723943","wikidata":"https://www.wikidata.org/wiki/Q1127410","display_name":"Serialization","level":2,"score":0.460018128156662},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.45033836364746094},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42294052243232727},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.4121285080909729},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.38300424814224243},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.28794124722480774},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19898721575737},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.16866323351860046},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.13381406664848328},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13009348511695862},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.08896327018737793},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C106159729","wikidata":"https://www.wikidata.org/wiki/Q2294553","display_name":"Financial economics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2018.8494254","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2018.8494254","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W105286987","https://openalex.org/W2007605560","https://openalex.org/W2014759009","https://openalex.org/W2015794844","https://openalex.org/W2119119508","https://openalex.org/W2594509431","https://openalex.org/W6991345346"],"related_works":["https://openalex.org/W2169622190","https://openalex.org/W3006003651","https://openalex.org/W2133326759","https://openalex.org/W2052455055","https://openalex.org/W4386968318","https://openalex.org/W1564063853","https://openalex.org/W2117541676","https://openalex.org/W331180034","https://openalex.org/W1506442459","https://openalex.org/W1855246538"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,11,66],"new":[4],"scheme":[5,27],"of":[6,38,74],"clock":[7,13,31],"synchronous":[8,25],"reset":[9,26],"and":[10,34,40,52],"two-step":[12],"skew":[14,46],"calibration":[15,47],"method":[16],"in":[17,30,56,65,79],"multi-lane":[18],"time-interleaved":[19],"ADC":[20,77],"based":[21],"coherent":[22,69],"receivers.":[23],"The":[24,45],"eliminates":[28],"metastability":[29],"generation":[32],"circuits":[33],"guarantees":[35],"reliable":[36],"synchronization":[37],"sampling":[39,59],"de-serializing":[41],"among":[42],"all":[43],"lanes.":[44],"compensates":[48],"for":[49],"both":[50],"inter-lane":[51],"intra-lane":[53],"timing":[54],"mismatches":[55],"critical":[57],"quadrature":[58],"clocks.":[60],"Our":[61],"proposal":[62],"is":[63],"demonstrated":[64],"fully":[67],"integrated":[68],"receiver":[70],"including":[71],"4":[72],"lanes":[73],"65GS/s":[75],"8-bit":[76],"fabricated":[78],"16nm":[80],"FinFET":[81],"CMOS.":[82]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}