{"id":"https://openalex.org/W1967676352","doi":"https://doi.org/10.1109/esscirc.2012.6341287","title":"A 260mV 468GOPS/W 256b 4-way to 32-way vector shifter with permute-assisted skip in 22nm tri-gate CMOS","display_name":"A 260mV 468GOPS/W 256b 4-way to 32-way vector shifter with permute-assisted skip in 22nm tri-gate CMOS","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W1967676352","doi":"https://doi.org/10.1109/esscirc.2012.6341287","mag":"1967676352"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2012.6341287","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2012.6341287","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the ESSCIRC (ESSCIRC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006348328","display_name":"Amit Agarwal","orcid":"https://orcid.org/0000-0002-4220-3346"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Amit Agarwal","raw_affiliation_strings":["Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109340111","display_name":"Steven Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven Hsu","raw_affiliation_strings":["Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039276616","display_name":"Sanu Mathew","orcid":"https://orcid.org/0000-0003-1344-7533"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sanu Mathew","raw_affiliation_strings":["Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052106795","display_name":"Mark Anders","orcid":"https://orcid.org/0000-0001-5748-8420"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark Anders","raw_affiliation_strings":["Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081032347","display_name":"Himanshu Kaul","orcid":"https://orcid.org/0000-0003-1586-7486"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Himanshu Kaul","raw_affiliation_strings":["Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088477949","display_name":"Farhana Sheikh","orcid":"https://orcid.org/0000-0001-5078-0816"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Farhana Sheikh","raw_affiliation_strings":["Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074107306","display_name":"Ram Krishnamurthy","orcid":"https://orcid.org/0000-0002-2428-7099"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ram Krishnamurthy","raw_affiliation_strings":["Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Circuits Research Laboratory, Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Circuits Research Lab, Intel Labs, Intel Corporation, Hillsboro, OR 97124","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5006348328"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.04834404,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"177","last_page":"180"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7326420545578003},{"id":"https://openalex.org/keywords/byte","display_name":"Byte","score":0.6964901685714722},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5518867373466492},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5437477827072144},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5176949501037598},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.49776744842529297},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4564123749732971},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4401402473449707},{"id":"https://openalex.org/keywords/logic-level","display_name":"Logic level","score":0.43243715167045593},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4210740327835083},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4148997664451599},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3206709027290344},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27915745973587036},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.27894681692123413},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.2718965411186218},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12495815753936768}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7326420545578003},{"id":"https://openalex.org/C43364308","wikidata":"https://www.wikidata.org/wiki/Q8799","display_name":"Byte","level":2,"score":0.6964901685714722},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5518867373466492},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5437477827072144},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5176949501037598},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.49776744842529297},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4564123749732971},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4401402473449707},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.43243715167045593},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4210740327835083},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4148997664451599},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3206709027290344},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27915745973587036},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.27894681692123413},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.2718965411186218},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12495815753936768},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2012.6341287","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2012.6341287","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Proceedings of the ESSCIRC (ESSCIRC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1966637404","https://openalex.org/W2004984689","https://openalex.org/W2122144284","https://openalex.org/W2127945400","https://openalex.org/W2540789924","https://openalex.org/W6679224135"],"related_works":["https://openalex.org/W2170979950","https://openalex.org/W3008786049","https://openalex.org/W1900707063","https://openalex.org/W2082591327","https://openalex.org/W2056291297","https://openalex.org/W2169508744","https://openalex.org/W2580743037","https://openalex.org/W3023368799","https://openalex.org/W1892158000","https://openalex.org/W2102826383"],"abstract_inverted_index":{"A":[0],"4-way":[1],"to":[2,59],"32-way":[3],"reconfigurable":[4,31],"256b":[5],"vector":[6],"shifter":[7],"with":[8,49],"measured":[9,51],"2.3GHz":[10],"operation":[11],"consuming":[12],"41mW":[13],"is":[14],"fabricated":[15],"in":[16],"0.9V,":[17],"22nm":[18],"tri-gate":[19],"CMOS.":[20],"Byte-wise":[21],"any-to-any":[22],"permute-assisted":[23],"skip":[24],"for":[25],"coarse-grained":[26],"byte":[27],"shifts,":[28],"rotate-back":[29],"shifter,":[30],"mask":[32],"bit":[33],"generation/decoder":[34],"and":[35,43],"ultra-low":[36],"voltage":[37,47],"circuits":[38],"enable":[39],"38%":[40],"area":[41],"reduction":[42],"240mV-1.1V":[44],"wide":[45],"dynamic":[46],"range":[48],"a":[50],"8.2x":[52],"higher":[53],"energy":[54],"efficiency":[55],"at":[56],"260mV":[57],"compared":[58],"nominal":[60],"0.9V":[61],"operation.":[62]},"counts_by_year":[],"updated_date":"2026-05-03T08:25:01.440150","created_date":"2025-10-10T00:00:00"}