{"id":"https://openalex.org/W2180826839","doi":"https://doi.org/10.1109/esscirc.2008.4681824","title":"Low-power 32-bit dual-MAC 120 μW/MHz 1.0 V icyflex DSP/MCU core","display_name":"Low-power 32-bit dual-MAC 120 μW/MHz 1.0 V icyflex DSP/MCU core","publication_year":2008,"publication_date":"2008-09-01","ids":{"openalex":"https://openalex.org/W2180826839","doi":"https://doi.org/10.1109/esscirc.2008.4681824","mag":"2180826839"},"language":"en","primary_location":{"id":"doi:10.1109/esscirc.2008.4681824","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2008.4681824","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2008 - 34th European Solid-State Circuits Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053556778","display_name":"Claude Arm","orcid":null},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"C. Arm","raw_affiliation_strings":["CSEM, Neuchatel, Switzerland"],"affiliations":[{"raw_affiliation_string":"CSEM, Neuchatel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055836627","display_name":"S. Gyger","orcid":null},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"S. Gyger","raw_affiliation_strings":["CSEM, Neuchatel, Switzerland"],"affiliations":[{"raw_affiliation_string":"CSEM, Neuchatel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027052275","display_name":"Jean-Marc Masgonty","orcid":null},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"J.-M. Masgonty","raw_affiliation_strings":["CSEM, Neuchatel, Switzerland"],"affiliations":[{"raw_affiliation_string":"CSEM, Neuchatel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101611034","display_name":"Myfanwy Morgan","orcid":"https://orcid.org/0000-0001-5532-8941"},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"M. Morgan","raw_affiliation_strings":["CSEM, Neuchatel, Switzerland"],"affiliations":[{"raw_affiliation_string":"CSEM, Neuchatel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082489322","display_name":"Jean-Luc Nagel","orcid":null},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"J.-L. Nagel","raw_affiliation_strings":["CSEM, Neuchatel, Switzerland"],"affiliations":[{"raw_affiliation_string":"CSEM, Neuchatel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044663943","display_name":"Christian Piguet","orcid":null},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"C. Piguet","raw_affiliation_strings":["CSEM, Neuchatel, Switzerland"],"affiliations":[{"raw_affiliation_string":"CSEM, Neuchatel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045284563","display_name":"F. Rampogna","orcid":null},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"F. Rampogna","raw_affiliation_strings":["CSEM, Neuchatel, Switzerland"],"affiliations":[{"raw_affiliation_string":"CSEM, Neuchatel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023777887","display_name":"Patrick Volet","orcid":null},"institutions":[{"id":"https://openalex.org/I135218257","display_name":"Swiss Center for Electronics and Microtechnology (Switzerland)","ror":"https://ror.org/05nrrsx06","country_code":"CH","type":"company","lineage":["https://openalex.org/I135218257"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"P. Volet","raw_affiliation_strings":["CSEM, Neuchatel, Switzerland"],"affiliations":[{"raw_affiliation_string":"CSEM, Neuchatel, Switzerland","institution_ids":["https://openalex.org/I135218257"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5053556778"],"corresponding_institution_ids":["https://openalex.org/I135218257"],"apc_list":null,"apc_paid":null,"fwci":1.0398,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.82253038,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"190","last_page":"193"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9829999804496765,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9829999804496765,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9732999801635742,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.9276999831199646,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microcontroller","display_name":"Microcontroller","score":0.8364174962043762},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.722322940826416},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.7004981637001038},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6303818821907043},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6027463674545288},{"id":"https://openalex.org/keywords/32-bit","display_name":"32-bit","score":0.5394980907440186},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5393493175506592},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.5287268757820129},{"id":"https://openalex.org/keywords/16-bit","display_name":"16-bit","score":0.5146161317825317},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5055685043334961},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.486723929643631},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.47328492999076843},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4669227600097656},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.44528549909591675},{"id":"https://openalex.org/keywords/8-bit","display_name":"8-bit","score":0.4220467805862427},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10244283080101013},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09377294778823853}],"concepts":[{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.8364174962043762},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.722322940826416},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.7004981637001038},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6303818821907043},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6027463674545288},{"id":"https://openalex.org/C75695347","wikidata":"https://www.wikidata.org/wiki/Q225147","display_name":"32-bit","level":2,"score":0.5394980907440186},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5393493175506592},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.5287268757820129},{"id":"https://openalex.org/C33652231","wikidata":"https://www.wikidata.org/wiki/Q194368","display_name":"16-bit","level":2,"score":0.5146161317825317},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5055685043334961},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.486723929643631},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.47328492999076843},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4669227600097656},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.44528549909591675},{"id":"https://openalex.org/C187919765","wikidata":"https://www.wikidata.org/wiki/Q270159","display_name":"8-bit","level":2,"score":0.4220467805862427},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10244283080101013},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09377294778823853},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/esscirc.2008.4681824","is_oa":false,"landing_page_url":"https://doi.org/10.1109/esscirc.2008.4681824","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ESSCIRC 2008 - 34th European Solid-State Circuits Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W275470402","https://openalex.org/W4235586071","https://openalex.org/W6816752144"],"related_works":["https://openalex.org/W1526136018","https://openalex.org/W2046700619","https://openalex.org/W975020229","https://openalex.org/W3022308231","https://openalex.org/W2389022694","https://openalex.org/W622629732","https://openalex.org/W2121136872","https://openalex.org/W1464584969","https://openalex.org/W2080085342","https://openalex.org/W1902169700"],"abstract_inverted_index":{"A":[0],"low-power":[1],"programmable":[2],"combined":[3],"digital":[4],"signal":[5],"processor":[6],"(DSP)":[7],"and":[8,23],"micro-controller":[9],"unit":[10],"(MCU),":[11],"named":[12],"icyflex,":[13],"was":[14],"designed.":[15],"It":[16],"is":[17],"implemented":[18],"as":[19],"a":[20,35],"customizable,":[21],"synthesizable":[22],"reconfigurable":[24],"VHDL":[25],"software":[26],"intellectual":[27],"property":[28],"core.":[29],"Performance":[30],"values":[31],"are":[32],"given":[33],"for":[34],"0.18":[36],"micron":[37],"technology":[38],"integration.":[39]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}