{"id":"https://openalex.org/W2157227400","doi":"https://doi.org/10.1109/edcc.2006.11","title":"Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip","display_name":"Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip","publication_year":2006,"publication_date":"2006-10-01","ids":{"openalex":"https://openalex.org/W2157227400","doi":"https://doi.org/10.1109/edcc.2006.11","mag":"2157227400"},"language":"en","primary_location":{"id":"doi:10.1109/edcc.2006.11","is_oa":false,"landing_page_url":"https://doi.org/10.1109/edcc.2006.11","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 Sixth European Dependable Computing Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049530550","display_name":"Matthias F\u00fcgger","orcid":"https://orcid.org/0000-0001-5765-0301"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":true,"raw_author_name":"Matthias Fugger","raw_affiliation_strings":["Embedded Computing Systems Group, University of Technology, Vienna, Austria"],"affiliations":[{"raw_affiliation_string":"Embedded Computing Systems Group, University of Technology, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006249454","display_name":"Ulrich Schmid","orcid":"https://orcid.org/0000-0001-9831-8583"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Ulrich Schmid","raw_affiliation_strings":["Embedded Computing Systems Group, University of Technology, Vienna, Austria"],"affiliations":[{"raw_affiliation_string":"Embedded Computing Systems Group, University of Technology, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055262365","display_name":"Gottfried Fuchs","orcid":null},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Gottfried Fuchs","raw_affiliation_strings":["Embedded Computing Systems Group, University of Technology, Vienna, Austria"],"affiliations":[{"raw_affiliation_string":"Embedded Computing Systems Group, University of Technology, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077407231","display_name":"G. Kempf","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Gerald Kempf","raw_affiliation_strings":["Austrian Aerospace GmbH, Australia"],"affiliations":[{"raw_affiliation_string":"Austrian Aerospace GmbH, Australia","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5049530550"],"corresponding_institution_ids":["https://openalex.org/I145847075"],"apc_list":null,"apc_paid":null,"fwci":5.9921,"has_fulltext":false,"cited_by_count":34,"citation_normalized_percentile":{"value":0.96509173,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"87","last_page":"96"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8101165294647217},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7184217572212219},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7183563709259033},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.6667826771736145},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5396919250488281},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.48764312267303467},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.4617235064506531},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.45944535732269287},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.44962579011917114},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43735432624816895},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.43257033824920654},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4299776554107666},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3611048758029938},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.35344213247299194}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8101165294647217},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7184217572212219},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7183563709259033},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.6667826771736145},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5396919250488281},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.48764312267303467},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.4617235064506531},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.45944535732269287},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.44962579011917114},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43735432624816895},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43257033824920654},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4299776554107666},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3611048758029938},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.35344213247299194},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/edcc.2006.11","is_oa":false,"landing_page_url":"https://doi.org/10.1109/edcc.2006.11","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2006 Sixth European Dependable Computing Conference","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.606.249","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.606.249","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://ti.tuwien.ac.at/ecs/people/schmid/Mypapers/FSFK06.pdf","raw_type":"text"},{"id":"pmh:oai:repositum.tuwien.ac.at:1595603","is_oa":false,"landing_page_url":"http://resolver.obvsg.at/urn:nbn:at:at-ubtuw:1-28679","pdf_url":null,"source":{"id":"https://openalex.org/S4306400493","display_name":"reposiTUm (TU Wien)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I145847075","host_organization_name":"TU Wien","host_organization_lineage":["https://openalex.org/I145847075"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},{"id":"pmh:oai:repositum.tuwien.at:20.500.12708/10193","is_oa":false,"landing_page_url":"http://hdl.handle.net/20.500.12708/10193","pdf_url":null,"source":{"id":"https://openalex.org/S4306400494","display_name":"reposiTUm (TU Wien)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I145847075","host_organization_name":"TU Wien","host_organization_lineage":["https://openalex.org/I145847075"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Thesis"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320322855","display_name":"Mashhad University of Medical Sciences","ror":"https://ror.org/04sfka033"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W6649224","https://openalex.org/W607286884","https://openalex.org/W1489955306","https://openalex.org/W1545238651","https://openalex.org/W1563308903","https://openalex.org/W1609287256","https://openalex.org/W2023984413","https://openalex.org/W2029005287","https://openalex.org/W2047188336","https://openalex.org/W2067060908","https://openalex.org/W2095343473","https://openalex.org/W2101395364","https://openalex.org/W2106954140","https://openalex.org/W2119267849","https://openalex.org/W2121914493","https://openalex.org/W2137807823","https://openalex.org/W2141216052","https://openalex.org/W2143420037","https://openalex.org/W2157227400","https://openalex.org/W2162465831","https://openalex.org/W2163748441","https://openalex.org/W2170194695","https://openalex.org/W2528866802","https://openalex.org/W3137220996","https://openalex.org/W4231905827","https://openalex.org/W4248425282","https://openalex.org/W4285719527","https://openalex.org/W6618496817","https://openalex.org/W6629210123","https://openalex.org/W6677991033"],"related_works":["https://openalex.org/W2383333355","https://openalex.org/W2144353363","https://openalex.org/W2389325540","https://openalex.org/W2120447654","https://openalex.org/W2977179488","https://openalex.org/W3011158618","https://openalex.org/W2144453115","https://openalex.org/W2381710881","https://openalex.org/W2355622827","https://openalex.org/W2158463942"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"a":[3],"simple":[4,66],"fault-tolerant":[5],"tick":[6],"generation":[7],"algorithm":[8,80],"based":[9],"on":[10],"Srikanth":[11],"&":[12],"Toueg's":[13],"consistent":[14],"broadcast":[15],"primitive":[16],"that":[17,77],"can":[18],"be":[19],"directly":[20],"implemented":[21],"in":[22,131],"VLSI":[23,132],"using":[24],"asynchronous":[25,42],"digital":[26],"logic.":[27],"The":[28],"need":[29],"for":[30,87,124],"adaption":[31],"originates":[32],"from":[33,113],"two":[34],"peculiarities":[35],"of":[36,48,74,103],"hardware":[37],"implementations:":[38],"(i)":[39],"Fine-grained":[40],"parallel":[41],"computations,":[43],"which":[44,62],"undermines":[45],"the":[46,72,75,78,99,121],"concept":[47],"atomic":[49],"steps":[50],"common":[51],"to":[52,128],"all":[53],"distributed":[54],"computing":[55],"models,":[56],"and":[57,83,94,108,134],"(ii)":[58],"very":[59],"limited":[60],"resources,":[61],"makes":[63],"even":[64],"apparently":[65],"operations":[67],"prohibitively":[68],"costly.":[69],"We":[70],"provide":[71,109,120],"cornerstones":[73],"proof":[76],"resulting":[79],"is":[81],"correct,":[82],"give":[84],"analytic":[85],"expressions":[86],"performance":[88],"metrics":[89],"like":[90],"worst":[91],"case":[92],"precision":[93],"accuracy.":[95],"Moreover,":[96],"we":[97],"outline":[98],"major":[100],"building":[101],"blocks":[102],"our":[104,114],"synthesizable":[105],"VHDL":[106],"implementation":[107],"some":[110],"measurement":[111],"results":[112,118],"FPGA":[115],"prototype.":[116],"Our":[117],"hence":[119],"required":[122],"basis":[123],"investigating":[125],"robust":[126],"alternatives":[127],"synchronous":[129],"clocking":[130],"systems-on-chip":[133],"similar":[135],"applications":[136]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
