{"id":"https://openalex.org/W2908585976","doi":"https://doi.org/10.1109/dft.2018.8602985","title":"Multiple Fault Detection in Nano Programmable Logic Arrays","display_name":"Multiple Fault Detection in Nano Programmable Logic Arrays","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2908585976","doi":"https://doi.org/10.1109/dft.2018.8602985","mag":"2908585976"},"language":"en","primary_location":{"id":"doi:10.1109/dft.2018.8602985","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2018.8602985","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030224517","display_name":"Pilin Junsangsri","orcid":"https://orcid.org/0000-0003-1234-5631"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Pilin Junsangsri","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, MA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, MA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001979328","display_name":"Fabrizio Lombardi","orcid":"https://orcid.org/0000-0003-3152-3245"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fabrizio Lombardi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, MA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, MA","institution_ids":["https://openalex.org/I12912129"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5030224517"],"corresponding_institution_ids":["https://openalex.org/I12912129"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20788573,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"300","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10207","display_name":"Advanced biosensing and bioanalysis techniques","score":0.9922000169754028,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.991100013256073,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.5977610349655151},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5944378972053528},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5605237483978271},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.48715969920158386},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.46839046478271484},{"id":"https://openalex.org/keywords/computational-complexity-theory","display_name":"Computational complexity theory","score":0.4592449963092804},{"id":"https://openalex.org/keywords/time-complexity","display_name":"Time complexity","score":0.4553932547569275},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.45281025767326355},{"id":"https://openalex.org/keywords/linear-programming","display_name":"Linear programming","score":0.44090038537979126},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.4402525722980499},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.42773541808128357},{"id":"https://openalex.org/keywords/upper-and-lower-bounds","display_name":"Upper and lower bounds","score":0.4222114682197571},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.42202723026275635},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3951360285282135},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.33430394530296326},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.24877581000328064},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21341639757156372},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.20330482721328735},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.1549108326435089},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09884482622146606},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09582647681236267},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0873684287071228}],"concepts":[{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.5977610349655151},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5944378972053528},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5605237483978271},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.48715969920158386},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.46839046478271484},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.4592449963092804},{"id":"https://openalex.org/C311688","wikidata":"https://www.wikidata.org/wiki/Q2393193","display_name":"Time complexity","level":2,"score":0.4553932547569275},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.45281025767326355},{"id":"https://openalex.org/C41045048","wikidata":"https://www.wikidata.org/wiki/Q202843","display_name":"Linear programming","level":2,"score":0.44090038537979126},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.4402525722980499},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.42773541808128357},{"id":"https://openalex.org/C77553402","wikidata":"https://www.wikidata.org/wiki/Q13222579","display_name":"Upper and lower bounds","level":2,"score":0.4222114682197571},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.42202723026275635},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3951360285282135},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.33430394530296326},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.24877581000328064},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21341639757156372},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.20330482721328735},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.1549108326435089},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09884482622146606},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09582647681236267},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0873684287071228},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dft.2018.8602985","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2018.8602985","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W98197157","https://openalex.org/W128123307","https://openalex.org/W1532866890","https://openalex.org/W1979477906","https://openalex.org/W1998221215","https://openalex.org/W2003872791","https://openalex.org/W2029173745","https://openalex.org/W2033047794","https://openalex.org/W2047507725","https://openalex.org/W2069507241","https://openalex.org/W2075745859","https://openalex.org/W2097522758","https://openalex.org/W2106057522","https://openalex.org/W2136293553","https://openalex.org/W2138586957","https://openalex.org/W2139399616","https://openalex.org/W2141228178","https://openalex.org/W2147004330","https://openalex.org/W2154996425","https://openalex.org/W2162983760","https://openalex.org/W4233477625","https://openalex.org/W4239366183","https://openalex.org/W4285719527","https://openalex.org/W6603999858","https://openalex.org/W6605234255","https://openalex.org/W6631918818","https://openalex.org/W6658529027"],"related_works":["https://openalex.org/W3117015220","https://openalex.org/W3013792460","https://openalex.org/W1904803855","https://openalex.org/W1528933814","https://openalex.org/W2466591189","https://openalex.org/W3022525969","https://openalex.org/W2519750906","https://openalex.org/W2145970147","https://openalex.org/W2376859467","https://openalex.org/W4389045693"],"abstract_inverted_index":{"This":[0,47],"paper":[1],"presents":[2],"a":[3,9,42,101,139,155,181,189],"new":[4],"method":[5,87,137],"for":[6,207],"testing":[7,53,108],"on":[8,32,114],"go-nogo":[10],"basis":[11],"nano":[12,55,193],"programmable":[13],"logic":[14],"arrays;":[15],"the":[16,67,78,96,105,115,128,135,165,168,171,177,185,192,209,219,224],"basic":[17],"configuration":[18,118,213],"of":[19,23,107,117,159,167,188,212],"an":[20],"array":[21,97,160],"made":[22],"passive":[24,68],"and":[25,30,37,57,63,206],"active":[26,79],"interconnect":[27,69],"resources":[28,80],"(lines":[29],"switches)":[31],"two":[33],"connected":[34],"planes":[35,169],"(AND":[36],"OR)":[38],"is":[39,49,111,174,204,215],"analyzed":[40],"under":[41],"comprehensive":[43],"multiple":[44,98],"fault":[45,92],"model.":[46],"model":[48],"applicable":[50],"to":[51,123,199],"production":[52,134],"at":[54,133],"manufacturing":[56],"considers":[58],"faults":[59,76],"(such":[60],"as":[61,72,74,104,124,157],"stuck-at":[62],"bridging":[64],"faults)":[65],"in":[66,77,91,142,170,191],"line":[70],"structure":[71],"well":[73],"programming":[75,125],"(switching":[81],"or":[82],"crosspoint":[83],"faults).":[84],"The":[85],"proposed":[86,136,178],"achieves":[88,138],"full":[89],"coverage":[90],"detection":[93,203],"by":[94,223],"configuring":[95],"times":[99],"using":[100],"four-step":[102],"procedure;":[103],"complexity":[106,156,182],"such":[109],"chip":[110,129],"largely":[112],"dependent":[113],"number":[116,211],"rounds":[119,214],"(also":[120],"often":[121],"referred":[122],"phases)":[126],"that":[127,153,176,201],"must":[130],"undergo,":[131],"then":[132],"substantial":[140],"reduction":[141],"test":[143],"time":[144],"compared":[145],"with":[146,164,184],"previous":[147,151],"techniques.":[148],"Different":[149],"from":[150],"techniques":[152],"have":[154],"function":[158],"size":[161],"(i.e.":[162],"quadratic":[163],"dimension":[166,187],"array),":[172],"it":[173],"shown":[175],"technique":[179],"has":[180],"linear":[183],"largest":[186],"plane":[190],"array.":[194],"Simulation":[195],"results":[196],"are":[197],"provided":[198],"show":[200],"100%":[202],"achieved":[205],"detection,":[208],"average":[210],"significantly":[216],"less":[217],"than":[218],"upper":[220],"bound":[221],"predicted":[222],"presented":[225],"theory.":[226]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
