{"id":"https://openalex.org/W2910893392","doi":"https://doi.org/10.1109/dft.2018.8602841","title":"Construction of Latch Design with Complete Double Node Upset Tolerant Capability Using C-Element","display_name":"Construction of Latch Design with Complete Double Node Upset Tolerant Capability Using C-Element","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2910893392","doi":"https://doi.org/10.1109/dft.2018.8602841","mag":"2910893392"},"language":"en","primary_location":{"id":"doi:10.1109/dft.2018.8602841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2018.8602841","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103739935","display_name":"Yuta Yamamoto","orcid":null},"institutions":[{"id":"https://openalex.org/I159385669","display_name":"Chiba University","ror":"https://ror.org/01hjzeq58","country_code":"JP","type":"education","lineage":["https://openalex.org/I159385669"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Yuta Yamamoto","raw_affiliation_strings":["Graduate School of Science and Engineering, Chiba University"],"affiliations":[{"raw_affiliation_string":"Graduate School of Science and Engineering, Chiba University","institution_ids":["https://openalex.org/I159385669"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009094960","display_name":"Kazuteru Namba","orcid":"https://orcid.org/0000-0002-8316-7281"},"institutions":[{"id":"https://openalex.org/I159385669","display_name":"Chiba University","ror":"https://ror.org/01hjzeq58","country_code":"JP","type":"education","lineage":["https://openalex.org/I159385669"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kazuteru Namba","raw_affiliation_strings":["Graduate School of Engineering, Chiba University, Chiba, Japan"],"affiliations":[{"raw_affiliation_string":"Graduate School of Engineering, Chiba University, Chiba, Japan","institution_ids":["https://openalex.org/I159385669"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5103739935"],"corresponding_institution_ids":["https://openalex.org/I159385669"],"apc_list":null,"apc_paid":null,"fwci":0.6522,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.72537765,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9916999936103821,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.8423933386802673},{"id":"https://openalex.org/keywords/upset","display_name":"Upset","score":0.7580381035804749},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.7574788331985474},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6472366452217102},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6289864182472229},{"id":"https://openalex.org/keywords/single-event-upset","display_name":"Single event upset","score":0.6000894904136658},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5318149328231812},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24365121126174927},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.21149158477783203},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.16350266337394714},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.14110907912254333},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.08861511945724487},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.0866537094116211}],"concepts":[{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.8423933386802673},{"id":"https://openalex.org/C2778002589","wikidata":"https://www.wikidata.org/wiki/Q2406791","display_name":"Upset","level":2,"score":0.7580381035804749},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.7574788331985474},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6472366452217102},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6289864182472229},{"id":"https://openalex.org/C2780073065","wikidata":"https://www.wikidata.org/wiki/Q1476733","display_name":"Single event upset","level":3,"score":0.6000894904136658},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5318149328231812},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24365121126174927},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.21149158477783203},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.16350266337394714},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.14110907912254333},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.08861511945724487},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0866537094116211},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dft.2018.8602841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2018.8602841","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1659671481","https://openalex.org/W1899181454","https://openalex.org/W1980433502","https://openalex.org/W1995355345","https://openalex.org/W2015524290","https://openalex.org/W2034813406","https://openalex.org/W2050431855","https://openalex.org/W2096927458","https://openalex.org/W2122335215","https://openalex.org/W2134239437","https://openalex.org/W2162465831","https://openalex.org/W2169213530","https://openalex.org/W2293212301","https://openalex.org/W2545765209","https://openalex.org/W2614134370","https://openalex.org/W6737879966"],"related_works":["https://openalex.org/W2102538861","https://openalex.org/W1523508240","https://openalex.org/W2622269177","https://openalex.org/W2086616086","https://openalex.org/W2978528242","https://openalex.org/W2165400042","https://openalex.org/W2160088500","https://openalex.org/W3208260600","https://openalex.org/W2012451149","https://openalex.org/W3097930358"],"abstract_inverted_index":{"Due":[0],"to":[1,45,84,92],"VLSI":[2,35],"downsizing":[3],"and":[4,26,66],"high":[5,27],"integration,":[6],"the":[7,32,47,93],"incidence":[8],"of":[9,24,34,49],"soft":[10,15],"error":[11,16],"has":[12,36],"increased.":[13],"The":[14,62],"is":[17,43],"a":[18,80],"temporary":[19],"event":[20],"caused":[21],"by":[22,88],"striking":[23],"a-rays":[25],"energy":[28],"neutron":[29],"radiation.":[30],"Since":[31],"scale":[33],"become":[37],"smaller":[38],"in":[39],"recent":[40],"development,":[41],"it":[42],"necessary":[44],"consider":[46],"occurrence":[48],"not":[50,73],"only":[51],"single":[52],"node":[53,59],"upset":[54,60],"(SNU)":[55],"but":[56],"also":[57],"double":[58],"(DNU).":[61],"existing":[63],"High-performance,":[64],"Low-cost,":[65],"DNU":[67,81],"Tolerant":[68],"Latch":[69],"design":[70],"(HLDTL)":[71],"does":[72],"completely":[74],"tolerate":[75],"DNU.":[76],"This":[77],"paper":[78],"presents":[79],"tolerant":[82],"latch":[83],"solve":[85],"this":[86],"problem":[87],"adding":[89],"some":[90],"transistors":[91],"HLDTL":[94],"latch.":[95]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2019,"cited_by_count":1}],"updated_date":"2026-03-27T14:29:43.386196","created_date":"2025-10-10T00:00:00"}
