{"id":"https://openalex.org/W2784260351","doi":"https://doi.org/10.1109/dft.2017.8244454","title":"REMORA: A hybrid low-cost soft-error reliable fault tolerant architecture","display_name":"REMORA: A hybrid low-cost soft-error reliable fault tolerant architecture","publication_year":2017,"publication_date":"2017-10-01","ids":{"openalex":"https://openalex.org/W2784260351","doi":"https://doi.org/10.1109/dft.2017.8244454","mag":"2784260351"},"language":"en","primary_location":{"id":"doi:10.1109/dft.2017.8244454","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2017.8244454","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022692555","display_name":"Shoba Gopalakrishnan","orcid":null},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Shoba Gopalakrishnan","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, Delhi, IN"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, Delhi, IN","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073587430","display_name":"Virendra Singh","orcid":"https://orcid.org/0000-0002-7035-7844"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Virendra Singh","raw_affiliation_strings":["CADSL, Indian Institute of Technology, Bombay, India"],"affiliations":[{"raw_affiliation_string":"CADSL, Indian Institute of Technology, Bombay, India","institution_ids":["https://openalex.org/I162827531"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5022692555"],"corresponding_institution_ids":["https://openalex.org/I68891433"],"apc_list":null,"apc_paid":null,"fwci":0.1433,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.54295718,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9879999756813049,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.8106127977371216},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7490686178207397},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.6756728291511536},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6222445964813232},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.5932512283325195},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.576132595539093},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5486406683921814},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4993617534637451},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.49122685194015503},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.46746352314949036},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.427043616771698},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.39004307985305786},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.20322218537330627},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13308203220367432},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12080791592597961},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.09218180179595947},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.0882091224193573}],"concepts":[{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.8106127977371216},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7490686178207397},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.6756728291511536},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6222445964813232},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.5932512283325195},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.576132595539093},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5486406683921814},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4993617534637451},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.49122685194015503},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.46746352314949036},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.427043616771698},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.39004307985305786},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.20322218537330627},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13308203220367432},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12080791592597961},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.09218180179595947},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0882091224193573},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dft.2017.8244454","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2017.8244454","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1981514768","https://openalex.org/W1999309394","https://openalex.org/W2034593585","https://openalex.org/W2095928739","https://openalex.org/W2123331260","https://openalex.org/W2128941141","https://openalex.org/W2130189691","https://openalex.org/W2146984159","https://openalex.org/W2147435261","https://openalex.org/W2152757758","https://openalex.org/W2169596872","https://openalex.org/W2176741225","https://openalex.org/W2533946023","https://openalex.org/W3143733169","https://openalex.org/W4248346117"],"related_works":["https://openalex.org/W2044069930","https://openalex.org/W2078707653","https://openalex.org/W4224229821","https://openalex.org/W2079643259","https://openalex.org/W2969553121","https://openalex.org/W2593605297","https://openalex.org/W2782341877","https://openalex.org/W3196277062","https://openalex.org/W1862835629","https://openalex.org/W2485576852"],"abstract_inverted_index":{"Due":[0],"to":[1,89,93,125],"continuous":[2],"scaling":[3],"of":[4,20,33,44,71,163],"nano-CMOS":[5],"devices,":[6],"soft":[7,66,105,131],"errors":[8],"emerge":[9],"as":[10],"a":[11,30],"significant":[12],"design":[13,149],"concern.":[14],"The":[15,68,143,154,166],"correct":[16],"and":[17,47,60],"reliable":[18],"operation":[19],"these":[21],"devices":[22],"is":[23,79,115,150,157,169],"mandatory.":[24],"In":[25],"this":[26,82],"paper":[27],"we":[28],"propose":[29],"hybrid":[31],"scheme":[32],"fault":[34,49,63],"tolerant":[35,50],"architecture":[36,97],"called":[37],"REMORA.":[38],"This":[39,99],"method":[40],"combines":[41],"the":[42,55,94,101,109,127,148],"merits":[43],"both":[45],"software":[46,77],"hardware-based":[48],"techniques.":[51],"Additionally,":[52],"it":[53],"overcomes":[54],"impediment":[56],"faced":[57],"by":[58,140],"them":[59],"achieves":[61],"100%":[62],"coverage":[64],"for":[65],"errors.":[67,106],"persistent":[69],"issue":[70],"unprotected":[72],"code":[73,138],"which":[74],"exists":[75],"in":[76,81,137,147,161],"approaches":[78],"eliminated":[80],"proposal.":[83],"REMORA":[84,133],"includes":[85],"an":[86,135],"architectural":[87],"revision":[88],"incorporate":[90],"additional":[91,113,144],"instruction":[92,95],"set":[96],"(ISA).":[98],"protects":[100],"front":[102],"end":[103],"against":[104,130],"To":[107],"protect":[108,126],"back":[110],"end,":[111],"minimum":[112],"hardware":[114,145],"added.":[116],"Experimental":[117],"results":[118],"from":[119],"SPEC2006":[120],"benchmark":[121],"suite":[122],"indicate":[123],"that":[124],"entire":[128],"processor":[129],"errors,":[132],"incurs":[134],"increase":[136],"size":[139],"only":[141],"3%.":[142],"overhead":[146,156],"less":[151,158,170],"than":[152,159,171],"6%.":[153],"power":[155],"13%":[160],"spite":[162],"redundant":[164],"execution.":[165],"performance":[167],"degradation":[168],"28%.":[172]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
