{"id":"https://openalex.org/W2110881464","doi":"https://doi.org/10.1109/dft.2007.28","title":"A Sharable Built-in Self-repair for Semiconductor Memories with 2-D Redundancy Scheme","display_name":"A Sharable Built-in Self-repair for Semiconductor Memories with 2-D Redundancy Scheme","publication_year":2007,"publication_date":"2007-09-01","ids":{"openalex":"https://openalex.org/W2110881464","doi":"https://doi.org/10.1109/dft.2007.28","mag":"2110881464"},"language":"en","primary_location":{"id":"doi:10.1109/dft.2007.28","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2007.28","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041963066","display_name":"Swapnil Bahl","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094169","display_name":"STMicroelectronics (India)","ror":"https://ror.org/00ft7bw25","country_code":"IN","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210094169"]},{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH","IN"],"is_corresponding":true,"raw_author_name":"Swapnil Bahl","raw_affiliation_strings":["STMicroelectronics Limited, India","STMicroelectronics Ltd, Noida"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics Limited, India","institution_ids":["https://openalex.org/I4210094169"]},{"raw_affiliation_string":"STMicroelectronics Ltd, Noida","institution_ids":["https://openalex.org/I131827901"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5041963066"],"corresponding_institution_ids":["https://openalex.org/I131827901","https://openalex.org/I4210094169"],"apc_list":null,"apc_paid":null,"fwci":3.4833,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.92524108,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"4","issue":null,"first_page":"331","last_page":"339"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.8945341110229492},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.5961785316467285},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5797973275184631},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5599396824836731},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.4740329086780548},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4467678964138031},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4415563642978668},{"id":"https://openalex.org/keywords/maintenance-engineering","display_name":"Maintenance engineering","score":0.4362376034259796},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.41387826204299927},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3132258653640747},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10688573122024536}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.8945341110229492},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.5961785316467285},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5797973275184631},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5599396824836731},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.4740329086780548},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4467678964138031},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4415563642978668},{"id":"https://openalex.org/C23725684","wikidata":"https://www.wikidata.org/wiki/Q616377","display_name":"Maintenance engineering","level":2,"score":0.4362376034259796},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.41387826204299927},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3132258653640747},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10688573122024536},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dft.2007.28","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2007.28","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1597839486","https://openalex.org/W1922918362","https://openalex.org/W2040066907","https://openalex.org/W2044407030","https://openalex.org/W2082612512","https://openalex.org/W2088458800","https://openalex.org/W2096018418","https://openalex.org/W2098987953","https://openalex.org/W2105539905","https://openalex.org/W2119866499","https://openalex.org/W2155576314","https://openalex.org/W2156585715","https://openalex.org/W2159103279","https://openalex.org/W6635878571","https://openalex.org/W6683204303"],"related_works":["https://openalex.org/W1495042958","https://openalex.org/W2132635813","https://openalex.org/W51919102","https://openalex.org/W2108140302","https://openalex.org/W2126415012","https://openalex.org/W1527836777","https://openalex.org/W2099176192","https://openalex.org/W2000140246","https://openalex.org/W2105657695","https://openalex.org/W2090728180"],"abstract_inverted_index":{"Newer":[0],"technologies":[1],"like":[2],"90":[3],"nm":[4,7],"and":[5,21,28,35,50,95,124,137,146],"65":[6],"bring":[8],"with":[9],"them":[10],"new":[11],"challenges:":[12],"longer":[13],"time":[14],"to":[15],"process":[16],"maturity,":[17],"higher":[18],"defect":[19],"densities":[20],"poorer":[22],"yields.":[23],"The":[24,86,101,120],"quality":[25],"of":[26,40,91,112],"test":[27,139],"repair":[29,57,132],"determines":[30],"the":[31,43,45,125,135],"design's":[32],"final":[33],"yield":[34],"profitability.":[36],"With":[37],"increasing":[38,59],"amount":[39],"memory":[41,56],"on":[42],"chip,":[44],"need":[46],"for":[47,55,70,77,115,134],"an":[48],"efficient":[49],"fast":[51],"converging":[52],"perfect":[53,66],"algorithm":[54,67,128],"is":[58,68,81,89],"becoming":[60],"important.":[61],"In":[62],"this":[63],"paper,":[64],"a":[65,105,116,130],"presented":[69],"standalone":[71],"repairable":[72],"memories":[73,113],"as":[74,76,141,143],"well":[75,142],"situations":[78],"where":[79],"redundancy":[80,97,122],"shared":[82],"between":[83],"different":[84],"memories.":[85],"proposed":[87,126],"BISR":[88,102],"composed":[90],"Built-in":[92],"self-test":[93],"(BIST)":[94],"built-in":[96],"analysis":[98],"(BIRA)":[99],"module.":[100],"module":[103],"has":[104],"low":[106],"overhead":[107],"-":[108],"about":[109],"5.05":[110],"%":[111],"area":[114,145],"typical":[117],"automotive":[118],"chip.":[119],"proper":[121],"scheme":[123],"BIRA":[127],"ensure":[129],"high":[131],"rate":[133],"SOC":[136],"shorter":[138],"times":[140],"optimized":[144],"maximum":[147],"performance.":[148]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}