{"id":"https://openalex.org/W2099695230","doi":"https://doi.org/10.1109/ddecs.2010.5491770","title":"Memory elements based on minority-3 gates and inverters implemented in 90 nm CMOS","display_name":"Memory elements based on minority-3 gates and inverters implemented in 90 nm CMOS","publication_year":2010,"publication_date":"2010-04-01","ids":{"openalex":"https://openalex.org/W2099695230","doi":"https://doi.org/10.1109/ddecs.2010.5491770","mag":"2099695230"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2010.5491770","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2010.5491770","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026627174","display_name":"Snorre Aunet","orcid":"https://orcid.org/0000-0002-6465-8886"},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["NO"],"is_corresponding":true,"raw_author_name":"Snorre Aunet","raw_affiliation_strings":["Nanoelectronics group,  Department of informatics, University of Oslo, Oslo, Norway","Nanoelectronics group, Department of informatics, University of Oslo, Postbox 1080 Blindern, 0316 Oslo, Norway"],"affiliations":[{"raw_affiliation_string":"Nanoelectronics group,  Department of informatics, University of Oslo, Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"Nanoelectronics group, Department of informatics, University of Oslo, Postbox 1080 Blindern, 0316 Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022451187","display_name":"Amir Hasanbegovic","orcid":null},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["NO"],"is_corresponding":false,"raw_author_name":"Amir Hasanbegovic","raw_affiliation_strings":["Nanoelectronics group,  Department of informatics, University of Oslo, Oslo, Norway","Nanoelectronics group, Department of informatics, University of Oslo, Postbox 1080 Blindern, 0316 Oslo, Norway"],"affiliations":[{"raw_affiliation_string":"Nanoelectronics group,  Department of informatics, University of Oslo, Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"Nanoelectronics group, Department of informatics, University of Oslo, Postbox 1080 Blindern, 0316 Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5026627174"],"corresponding_institution_ids":["https://openalex.org/I184942183"],"apc_list":null,"apc_paid":null,"fwci":0.2886,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.64682423,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"267","last_page":"272"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8127995729446411},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.6927440762519836},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5873339176177979},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5284338593482971},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5267219543457031},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5070290565490723},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.4538028836250305},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.43402808904647827},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42252999544143677},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.37552642822265625},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.30435293912887573},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.29368314146995544},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2560473084449768}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8127995729446411},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.6927440762519836},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5873339176177979},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5284338593482971},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5267219543457031},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5070290565490723},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.4538028836250305},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.43402808904647827},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42252999544143677},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.37552642822265625},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.30435293912887573},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29368314146995544},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2560473084449768},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2010.5491770","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2010.5491770","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W298094446","https://openalex.org/W1538340476","https://openalex.org/W1539634823","https://openalex.org/W1841730948","https://openalex.org/W1972427123","https://openalex.org/W1972959929","https://openalex.org/W1982875408","https://openalex.org/W1995341919","https://openalex.org/W2049986605","https://openalex.org/W2104408907","https://openalex.org/W2107436693","https://openalex.org/W2108312065","https://openalex.org/W2110198381","https://openalex.org/W2130173786","https://openalex.org/W2148701399","https://openalex.org/W2155296713","https://openalex.org/W2159448561","https://openalex.org/W2162489687","https://openalex.org/W2163601309","https://openalex.org/W2164492816","https://openalex.org/W6676281391"],"related_works":["https://openalex.org/W3165307257","https://openalex.org/W2515312339","https://openalex.org/W2145098804","https://openalex.org/W4226211266","https://openalex.org/W2991151827","https://openalex.org/W2130440338","https://openalex.org/W1574518580","https://openalex.org/W2791832526","https://openalex.org/W2161229876","https://openalex.org/W4361799621"],"abstract_inverted_index":{"Two":[0],"memory":[1],"elements,":[2],"or":[3],"latches,":[4,19],"are":[5,8,44,60,96],"introduced.":[6],"They":[7],"similar":[9],"in":[10,56],"functionality":[11],"to":[12,29,62,82,116],"widely":[13],"used":[14,61],"NOR-":[15],"and":[16,35,49,74,89],"NAND-based":[17],"crosscoupled":[18],"but":[20],"unlike":[21],"the":[22,65,69],"traditional":[23,110],"latces":[24],"they":[25],"do":[26],"not":[27],"risk":[28],"produce":[30],"stable":[31],"states":[32],"where":[33],"Q":[34],"Q'":[36],"have":[37],"identical":[38],"binary":[39],"values.":[40],"The":[41],"suggested":[42],"solutions":[43],"built":[45],"from":[46],"two":[47],"inverters":[48],"one":[50],"minority-3":[51],"gate.":[52],"Monte":[53],"Carlo":[54],"simulations":[55],"90":[57],"nm":[58,91],"CMOS":[59,120],"demonstrate":[63],"that":[64],"circuits":[66],"may":[67,114],"maintain":[68],"digital":[70],"abstraction":[71],"under":[72],"mismatch":[73],"process":[75],"variations":[76],"for":[77,100],"a":[78],"supply":[79],"voltage":[80],"down":[81],"140":[83],"mV":[84],"at":[85],"20":[86],"degrees":[87],"C":[88],"100":[90],"gate":[92],"lengths.":[93],"Chip":[94],"measurements":[95],"included.":[97],"Reliability":[98],"issues":[99],"low":[101],"fan-in":[102],"threshold":[103,121],"gates":[104],"might":[105],"favour":[106],"them":[107],"over":[108],"some":[109],"Boolean":[111],"implementations,":[112],"which":[113],"contribute":[115],"increased":[117],"use":[118],"of":[119],"gates,":[122],"if":[123],"proven.":[124]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}