{"id":"https://openalex.org/W4245101129","doi":"https://doi.org/10.1109/date.2010.5456986","title":"Automatic generation of software TLM in multiple abstraction layers for efficient HW/SW co-simulation","display_name":"Automatic generation of software TLM in multiple abstraction layers for efficient HW/SW co-simulation","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W4245101129","doi":"https://doi.org/10.1109/date.2010.5456986"},"language":"en","primary_location":{"id":"doi:10.1109/date.2010.5456986","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2010.5456986","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE 2010)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110911409","display_name":"Meng-Huan Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Meng-Huan Wu","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083644516","display_name":"Wen\u2010Chuan Lee","orcid":"https://orcid.org/0000-0001-9255-0170"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wen-Chuan Lee","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017227782","display_name":"Chen-Yu Chuang","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chen-Yu Chuang","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046952008","display_name":"Ren\u2010Song Tsay","orcid":"https://orcid.org/0000-0002-8997-0219"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ren-Song Tsay","raw_affiliation_strings":["Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5110911409"],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":null,"apc_paid":null,"fwci":0.8659,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.79240482,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1177","last_page":"1182"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9200000166893005,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9200000166893005,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.8114548921585083},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.81010901927948},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.728299617767334},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.65434730052948},{"id":"https://openalex.org/keywords/transaction-level-modeling","display_name":"Transaction-level modeling","score":0.6041402816772461},{"id":"https://openalex.org/keywords/concurrency","display_name":"Concurrency","score":0.5012962818145752},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.49946069717407227},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4865759611129761},{"id":"https://openalex.org/keywords/abstraction-layer","display_name":"Abstraction layer","score":0.4855925440788269},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44378334283828735},{"id":"https://openalex.org/keywords/co-simulation","display_name":"Co-simulation","score":0.4177654981613159},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39686524868011475},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.2912081778049469},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.28910744190216064},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.18475601077079773},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.13198024034500122},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.08171862363815308}],"concepts":[{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.8114548921585083},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.81010901927948},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.728299617767334},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.65434730052948},{"id":"https://openalex.org/C169571997","wikidata":"https://www.wikidata.org/wiki/Q966099","display_name":"Transaction-level modeling","level":3,"score":0.6041402816772461},{"id":"https://openalex.org/C193702766","wikidata":"https://www.wikidata.org/wiki/Q1414548","display_name":"Concurrency","level":2,"score":0.5012962818145752},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.49946069717407227},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4865759611129761},{"id":"https://openalex.org/C147358964","wikidata":"https://www.wikidata.org/wiki/Q1200992","display_name":"Abstraction layer","level":3,"score":0.4855925440788269},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44378334283828735},{"id":"https://openalex.org/C2780974030","wikidata":"https://www.wikidata.org/wiki/Q16951926","display_name":"Co-simulation","level":2,"score":0.4177654981613159},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39686524868011475},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.2912081778049469},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.28910744190216064},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.18475601077079773},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.13198024034500122},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.08171862363815308},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2010.5456986","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2010.5456986","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE 2010)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W2037800158","https://openalex.org/W2073418263","https://openalex.org/W2096258337","https://openalex.org/W2102570774","https://openalex.org/W2104603273","https://openalex.org/W2113952960","https://openalex.org/W2120496971","https://openalex.org/W2135056409","https://openalex.org/W2157797887","https://openalex.org/W4238549726","https://openalex.org/W6677960119","https://openalex.org/W6679734440"],"related_works":["https://openalex.org/W2102035898","https://openalex.org/W1525398417","https://openalex.org/W2888412165","https://openalex.org/W3141304504","https://openalex.org/W2012868342","https://openalex.org/W1486803855","https://openalex.org/W1831349210","https://openalex.org/W2136770003","https://openalex.org/W2136042826","https://openalex.org/W2124238602"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,140],"novel":[4],"software":[5,26,76,91,108],"Transaction-Level":[6],"Modeling":[7],"(TLM)":[8],"approach":[9,49],"for":[10,28,118,128],"efficient":[11,136],"HW/SW":[12,15,58],"co-simulation.":[13],"In":[14],"co-simulation,":[16],"timing":[17,35,51],"synchronization":[18,36,52],"should":[19],"be":[20,66,95],"involved":[21],"between":[22],"the":[23,40,45,55,61,81,87,90,145],"hardware":[24,149],"and":[25,121],"simulations":[27],"keeping":[29],"their":[30],"concurrency.":[31],"However,":[32],"improperly":[33],"handling":[34],"either":[37],"slows":[38],"down":[39],"simulation":[41,46,63],"speed":[42],"or":[43],"scarifies":[44],"accuracy.":[47],"Our":[48],"performs":[50],"only":[53],"at":[54],"points":[56],"of":[57,75,83,147],"interactions,":[59],"so":[60],"accurate":[62],"result":[64],"can":[65,94,134],"achieved":[67],"efficiently.":[68],"Furthermore,":[69],"we":[70],"define":[71],"three":[72],"abstraction":[73,100,120,146],"levels":[74],"TLM":[77,92,109],"models":[78,93,110],"based":[79],"on":[80],"type":[82],"interactions":[84],"captured.":[85],"Given":[86],"target":[88],"software,":[89],"automatically":[96],"generated":[97],"in":[98],"multiple":[99],"layers.":[101],"The":[102],"experimental":[103],"results":[104],"show":[105],"that":[106],"our":[107],"attain":[111],"3":[112],"million":[113],"instructions":[114],"per":[115],"second":[116],"(MIPS)":[117],"low-level":[119],"go":[122],"as":[123,125],"high":[124],"248":[126],"MIPS":[127],"higher":[129],"level":[130],"abstraction.":[131],"Therefore,":[132],"designers":[133],"have":[135],"co-simulation":[137],"by":[138],"selecting":[139],"proper":[141],"layer":[142],"according":[143],"to":[144],"corresponding":[148],"components.":[150]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
