{"id":"https://openalex.org/W2108458658","doi":"https://doi.org/10.1109/dasip.2010.5706253","title":"Generation of static tables in embedded memory with dense scheduling","display_name":"Generation of static tables in embedded memory with dense scheduling","publication_year":2010,"publication_date":"2010-10-01","ids":{"openalex":"https://openalex.org/W2108458658","doi":"https://doi.org/10.1109/dasip.2010.5706253","mag":"2108458658"},"language":"en","primary_location":{"id":"doi:10.1109/dasip.2010.5706253","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dasip.2010.5706253","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080472332","display_name":"Beno\u00eet Miramond","orcid":"https://orcid.org/0000-0002-1229-7046"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210142324","display_name":"CY Cergy Paris Universit\u00e9","ror":"https://ror.org/043htjv09","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210142324"]},{"id":"https://openalex.org/I4210148552","display_name":"Equipes Traitement de l'Information et Syst\u00e8mes","ror":"https://ror.org/0592ata02","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210142324","https://openalex.org/I4210148552","https://openalex.org/I4210159245","https://openalex.org/I86175216"]},{"id":"https://openalex.org/I86175216","display_name":"\u00c9cole Nationale Sup\u00e9rieure de l'\u00c9lectronique et de ses Applications","ror":"https://ror.org/03qeacd72","country_code":"FR","type":"education","lineage":["https://openalex.org/I86175216"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Benot Miramond","raw_affiliation_strings":["ETIS Laboratory, UMR, Cergy-Pontoise, France","ETIS Lab., UMR 8051 CNRS/ENSEA/UCP, 6 Avenue du ponceau, F-95000 Cergy-Pontoise, France"],"affiliations":[{"raw_affiliation_string":"ETIS Laboratory, UMR, Cergy-Pontoise, France","institution_ids":["https://openalex.org/I4210148552"]},{"raw_affiliation_string":"ETIS Lab., UMR 8051 CNRS/ENSEA/UCP, 6 Avenue du ponceau, F-95000 Cergy-Pontoise, France","institution_ids":["https://openalex.org/I86175216","https://openalex.org/I4210142324","https://openalex.org/I1294671590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083800155","display_name":"Liliana Cucu\u2010Grosjean","orcid":"https://orcid.org/0000-0001-5363-4187"},"institutions":[{"id":"https://openalex.org/I1326498283","display_name":"Institut national de recherche en sciences et technologies du num\u00e9rique","ror":"https://ror.org/02kvxyf05","country_code":"FR","type":"government","lineage":["https://openalex.org/I1326498283"]},{"id":"https://openalex.org/I4210127166","display_name":"Centre Inria de l'Universit\u00e9 de Lorraine","ror":"https://ror.org/03fcjvn64","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1326498283","https://openalex.org/I4210127166"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Liliana Cucu-Grosjean","raw_affiliation_strings":["INRIA Nancy-Grand Est, TRIO, Villers-les-Nancy, France","TRIO, INRIA Nancy-Grand Est, 615, rue du Jardin Botanique, 54000, Villers les Nancy, France"],"affiliations":[{"raw_affiliation_string":"INRIA Nancy-Grand Est, TRIO, Villers-les-Nancy, France","institution_ids":["https://openalex.org/I4210127166"]},{"raw_affiliation_string":"TRIO, INRIA Nancy-Grand Est, 615, rue du Jardin Botanique, 54000, Villers les Nancy, France","institution_ids":["https://openalex.org/I4210127166","https://openalex.org/I1326498283"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5080472332"],"corresponding_institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I4210142324","https://openalex.org/I4210148552","https://openalex.org/I86175216"],"apc_list":null,"apc_paid":null,"fwci":0.2527,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.59027067,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"105","last_page":"112"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8186739683151245},{"id":"https://openalex.org/keywords/predictability","display_name":"Predictability","score":0.6348955631256104},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.6290923357009888},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5165618658065796},{"id":"https://openalex.org/keywords/dynamic-priority-scheduling","display_name":"Dynamic priority scheduling","score":0.48845115303993225},{"id":"https://openalex.org/keywords/context-switch","display_name":"Context switch","score":0.4439193904399872},{"id":"https://openalex.org/keywords/fair-share-scheduling","display_name":"Fair-share scheduling","score":0.44367220997810364},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.4416612386703491},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4314414858818054},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.4275115728378296},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3987571597099304},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.33689072728157043},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3062043786048889},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.22324657440185547},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17892730236053467},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.1089087724685669}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8186739683151245},{"id":"https://openalex.org/C197640229","wikidata":"https://www.wikidata.org/wiki/Q2534066","display_name":"Predictability","level":2,"score":0.6348955631256104},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.6290923357009888},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5165618658065796},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.48845115303993225},{"id":"https://openalex.org/C53833338","wikidata":"https://www.wikidata.org/wiki/Q1061424","display_name":"Context switch","level":2,"score":0.4439193904399872},{"id":"https://openalex.org/C31689143","wikidata":"https://www.wikidata.org/wiki/Q733809","display_name":"Fair-share scheduling","level":3,"score":0.44367220997810364},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.4416612386703491},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4314414858818054},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.4275115728378296},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3987571597099304},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.33689072728157043},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3062043786048889},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.22324657440185547},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17892730236053467},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.1089087724685669},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dasip.2010.5706253","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dasip.2010.5706253","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1481968117","https://openalex.org/W1545238651","https://openalex.org/W1563522785","https://openalex.org/W1574709890","https://openalex.org/W1594053261","https://openalex.org/W1605012541","https://openalex.org/W1978879661","https://openalex.org/W2018489958","https://openalex.org/W2114732989","https://openalex.org/W2123952177","https://openalex.org/W2131069932","https://openalex.org/W2137784941","https://openalex.org/W2141737318","https://openalex.org/W2146534700","https://openalex.org/W2161432424","https://openalex.org/W6628646468","https://openalex.org/W6633649885","https://openalex.org/W6635681447","https://openalex.org/W6654973744"],"related_works":["https://openalex.org/W2184166483","https://openalex.org/W2397293317","https://openalex.org/W2377713709","https://openalex.org/W2373973180","https://openalex.org/W2372008037","https://openalex.org/W2978148977","https://openalex.org/W3003077338","https://openalex.org/W2159726545","https://openalex.org/W2127936411","https://openalex.org/W4308301330"],"abstract_inverted_index":{"In":[0],"a":[1,35,62,70],"real-time":[2,67,75],"context,":[3],"designing":[4],"the":[5,25,29,49,53,83,89,118,129],"software":[6],"relies":[7],"on":[8],"insuring":[9],"deterministic":[10],"behavior":[11],"and":[12,19,69],"predictability.":[13],"With":[14],"system":[15],"controlling":[16],"several":[17],"sensors":[18],"actuators":[20],"sampled":[21],"at":[22,93],"different":[23],"rates":[24],"scheduling":[26,42,90],"theory":[27],"associates":[28],"notion":[30],"of":[31,38,48,55,65,88,122,128],"Hyperperiod.":[32],"It":[33],"is":[34,80,125],"major":[36],"factor":[37],"complexity":[39],"whether":[40],"for":[41,46,73],"validation":[43],"(simulation),":[44],"or":[45],"generation":[47],"corresponding":[50],"tables":[51,91],"in":[52,85,100,103],"case":[54,116],"pure":[56],"off-line":[57],"schedules.":[58,111],"This":[59,95],"paper":[60],"presents":[61],"compression":[63,120],"method":[64,96],"static":[66],"schedules":[68,131],"design":[71],"flow":[72],"generating":[74],"hardware":[76],"schedulers.":[77],"The":[78],"goal":[79],"to":[81,105,114],"minimize":[82],"size":[84],"embedded":[86],"memory":[87],"defined":[92],"compile-time.":[94],"exploits":[97],"Idle":[98],"times":[99],"multiprocessors":[101],"systems":[102],"order":[104],"identify":[106],"cyclic":[107],"patterns":[108],"called":[109],"dense":[110],"When":[112],"applied":[113],"our":[115,123],"studies,":[117],"average":[119],"rate":[121],"technique":[124],"near":[126],"90%":[127],"initial":[130],"size.":[132]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-04-21T08:09:41.155169","created_date":"2025-10-10T00:00:00"}
