{"id":"https://openalex.org/W4414196981","doi":"https://doi.org/10.1109/dac63849.2025.11132928","title":"EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components","display_name":"EPICS: Efficient Parallel Pattern Fault Simulation for Sequential Circuits via Strongly Connected Components","publication_year":2025,"publication_date":"2025-06-22","ids":{"openalex":"https://openalex.org/W4414196981","doi":"https://doi.org/10.1109/dac63849.2025.11132928"},"language":"en","primary_location":{"id":"doi:10.1109/dac63849.2025.11132928","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11132928","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100734758","display_name":"Mingjun Wang","orcid":"https://orcid.org/0000-0003-0829-0359"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Mingjun Wang","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100460927","display_name":"Hui Wang","orcid":"https://orcid.org/0000-0003-4970-5282"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hui Wang","raw_affiliation_strings":["CASTEST Co., Ltd"],"affiliations":[{"raw_affiliation_string":"CASTEST Co., Ltd","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010522760","display_name":"Jianan Mu","orcid":"https://orcid.org/0000-0001-8513-0792"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianan Mu","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100390687","display_name":"Xinyu Zhang","orcid":"https://orcid.org/0000-0001-9688-8056"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinyu Zhang","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006007746","display_name":"Bin Sun","orcid":"https://orcid.org/0000-0002-5663-4294"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Bin Sun","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111116427","display_name":"Yihan Wen","orcid":null},"institutions":[{"id":"https://openalex.org/I37796252","display_name":"Beijing University of Technology","ror":"https://ror.org/037b1pp87","country_code":"CN","type":"education","lineage":["https://openalex.org/I37796252"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yihan Wen","raw_affiliation_strings":["Beijing University of Technology"],"affiliations":[{"raw_affiliation_string":"Beijing University of Technology","institution_ids":["https://openalex.org/I37796252"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103202637","display_name":"Zizhen Liu","orcid":"https://orcid.org/0000-0002-1674-9361"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zizhen Liu","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5116500184","display_name":"Feng Gu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Feng Gu","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101671182","display_name":"Jun Gao","orcid":"https://orcid.org/0000-0003-2847-9650"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jun Gao","raw_affiliation_strings":["CASTEST Co., Ltd"],"affiliations":[{"raw_affiliation_string":"CASTEST Co., Ltd","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101073487","display_name":"Shengwen Liang","orcid":null},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shengwen Liang","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100394414","display_name":"Jing Ye","orcid":"https://orcid.org/0000-0002-8023-5090"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jing Ye","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023380073","display_name":"Xiaowei Li","orcid":"https://orcid.org/0000-0002-0874-814X"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaowei Li","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100768288","display_name":"Huawei Li","orcid":"https://orcid.org/0000-0001-8082-4218"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huawei Li","raw_affiliation_strings":["State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of Computing Technology, Chinese Academy of Sciences","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":13,"corresponding_author_ids":["https://openalex.org/A5100734758"],"corresponding_institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210090176"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.23385488,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9854000210762024,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.775600016117096},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6284000277519226},{"id":"https://openalex.org/keywords/tree-traversal","display_name":"Tree traversal","score":0.5891000032424927},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.5841000080108643},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.5647000074386597},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5582000017166138},{"id":"https://openalex.org/keywords/event","display_name":"Event (particle physics)","score":0.451200008392334},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4277999997138977},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.40790000557899475},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.38659998774528503}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8159000277519226},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.775600016117096},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6284000277519226},{"id":"https://openalex.org/C140745168","wikidata":"https://www.wikidata.org/wiki/Q1210082","display_name":"Tree traversal","level":2,"score":0.5891000032424927},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.5841000080108643},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.5647000074386597},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5582000017166138},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4684999883174896},{"id":"https://openalex.org/C2779662365","wikidata":"https://www.wikidata.org/wiki/Q5416694","display_name":"Event (particle physics)","level":2,"score":0.451200008392334},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4415999948978424},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4277999997138977},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.40790000557899475},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.38989999890327454},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.38659998774528503},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.37070000171661377},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.36899998784065247},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3625999987125397},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3619000017642975},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.3522999882698059},{"id":"https://openalex.org/C174220543","wikidata":"https://www.wikidata.org/wiki/Q395307","display_name":"Rollback","level":3,"score":0.3366999924182892},{"id":"https://openalex.org/C186886427","wikidata":"https://www.wikidata.org/wiki/Q5441213","display_name":"Feedback loop","level":2,"score":0.3361999988555908},{"id":"https://openalex.org/C167391956","wikidata":"https://www.wikidata.org/wiki/Q1401211","display_name":"Fault model","level":3,"score":0.3280999958515167},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.32589998841285706},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.322299987077713},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.2987000048160553},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.29750001430511475},{"id":"https://openalex.org/C2776365744","wikidata":"https://www.wikidata.org/wiki/Q5438149","display_name":"Fault Simulator","level":5,"score":0.2930999994277954},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.2897999882698059},{"id":"https://openalex.org/C108010975","wikidata":"https://www.wikidata.org/wiki/Q500094","display_name":"Pruning","level":2,"score":0.2888999879360199},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.28690001368522644},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.2840999960899353},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.28380000591278076},{"id":"https://openalex.org/C13625343","wikidata":"https://www.wikidata.org/wiki/Q7627418","display_name":"Stuck-at fault","level":4,"score":0.28290000557899475},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.28279998898506165},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.27219998836517334},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.2694999873638153},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.2632000148296356},{"id":"https://openalex.org/C147203929","wikidata":"https://www.wikidata.org/wiki/Q574814","display_name":"Discrete event simulation","level":2,"score":0.26249998807907104},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.2614000141620636},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.259799987077713}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dac63849.2025.11132928","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dac63849.2025.11132928","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 62nd ACM/IEEE Design Automation Conference (DAC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W146642348","https://openalex.org/W1593435444","https://openalex.org/W1964839541","https://openalex.org/W1999039453","https://openalex.org/W2011301810","https://openalex.org/W2062132293","https://openalex.org/W2062798743","https://openalex.org/W2068650642","https://openalex.org/W2081990463","https://openalex.org/W2089121515","https://openalex.org/W2097763997","https://openalex.org/W2098426274","https://openalex.org/W2114179588","https://openalex.org/W2118032958","https://openalex.org/W2118382442","https://openalex.org/W2124618076","https://openalex.org/W2134747538","https://openalex.org/W2135129887","https://openalex.org/W2149649154","https://openalex.org/W2171587453","https://openalex.org/W2586949297","https://openalex.org/W2744030965","https://openalex.org/W2885828488","https://openalex.org/W2954567619","https://openalex.org/W3006302138","https://openalex.org/W3014325818","https://openalex.org/W4210836009","https://openalex.org/W4211162720","https://openalex.org/W4237208414","https://openalex.org/W4255121717","https://openalex.org/W4366451101","https://openalex.org/W4395703257","https://openalex.org/W4399207699","https://openalex.org/W4402389806"],"related_works":[],"abstract_inverted_index":{"As":[0],"functional":[1],"safety":[2],"of":[3,151],"electronic":[4],"chips":[5],"gains":[6],"importance":[7],"in":[8,40,78,84,96,114],"autonomous":[9],"vehicles":[10],"and":[11,51,63,72,174,192,213],"aerospace,":[12],"standards":[13],"like":[14,70],"ISO":[15],"26262":[16],"mandate":[17],"high":[18],"diagnostic":[19],"coverage,":[20],"requiring":[21],"extensive":[22],"gate-level":[23],"fault":[24,61,124,237],"simulations.":[25,139],"However,":[26],"for":[27,165,180],"large-scale":[28],"industrial":[29],"sequential":[30,85,137],"circuits,":[31],"these":[32,104,202],"simulations":[33,74,98,215],"are":[34],"time-consuming,":[35],"creating":[36],"a":[37,121,225],"significant":[38],"bottleneck":[39],"chip":[41],"development.":[42],"Prior":[43],"approaches":[44],"have":[45,75],"focused":[46],"on":[47,171],"reducing":[48],"computational":[49],"complexity":[50],"optimizing":[52],"CPU":[53],"hardware":[54],"usage":[55],"by":[56,109,189],"minimizing":[57],"redundant":[58],"computations":[59],"during":[60],"propagation":[62,178],"leveraging":[64],"bit-level":[65],"parallel":[66],"processing":[67],"capabilities.":[68],"Techniques":[69],"parallel-pattern":[71,123],"event-driven":[73,214],"improved":[76],"performance":[77],"combinational":[79],"circuits":[80,86],"but":[81],"face":[82],"limitations":[83],"due":[87],"to":[88,135,216],"timing":[89],"dependencies":[90],"within":[91],"loops.":[92],"The":[93],"challenge":[94],"lies":[95],"parallelizing":[97],"across":[99],"different":[100],"cycles":[101],"without":[102,154],"violating":[103],"dependencies,":[105],"which":[106,209],"is":[107],"exacerbated":[108],"the":[110,149,176,235],"complex":[111],"feedback":[112,152],"structures":[113],"SCCs.":[115],"In":[116],"this":[117],"work,":[118],"we":[119,147,161],"propose":[120],"novel":[122],"simulation":[125,186,206],"framework":[126],"that":[127,222],"combines":[128],"loop":[129,167],"fusion":[130],"with":[131,196],"efficient":[132],"event":[133,198],"traversal":[134],"accelerate":[136],"circuit":[138],"By":[140],"compiling":[141],"simple":[142],"loops":[143],"into":[144,204],"larger":[145,159],"nodes,":[146],"reduce":[148],"number":[150],"events":[153,187],"introducing":[155],"excessive":[156],"redundancy.":[157],"For":[158],"SCCs,":[160],"develop":[162],"specialized":[163],"algorithms":[164],"selecting":[166],"entrance":[168],"nodes":[169],"based":[170],"indegree":[172],"analysis":[173],"implement":[175],"lazy":[177],"strategy":[179],"internal":[181],"nodes.":[182],"This":[183],"approach":[184],"minimizes":[185],"caused":[188],"inaccurate":[190],"predictions":[191],"reduces":[193],"overhead":[194],"associated":[195],"false":[197],"propagation.":[199],"We":[200],"integrate":[201],"techniques":[203],"our":[205],"framework,":[207],"EPICS,":[208],"strategically":[210],"mixes":[211],"compiled":[212],"optimize":[217],"performance.":[218],"Experimental":[219],"results":[220],"demonstrate":[221],"EPICS":[223],"achieves":[224],"$5.94":[226],"\\times$":[227],"speedup":[228],"over":[229],"state-of-the-art":[230],"commercial":[231],"tool":[232],"while":[233],"maintaining":[234],"same":[236],"coverage.":[238]},"counts_by_year":[],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2025-10-10T00:00:00"}