{"id":"https://openalex.org/W2544077880","doi":"https://doi.org/10.1109/cmpcon.1994.282894","title":"The PowerPC 603 microprocessor: a low-power design for portable applications","display_name":"The PowerPC 603 microprocessor: a low-power design for portable applications","publication_year":2002,"publication_date":"2002-12-17","ids":{"openalex":"https://openalex.org/W2544077880","doi":"https://doi.org/10.1109/cmpcon.1994.282894","mag":"2544077880"},"language":"en","primary_location":{"id":"doi:10.1109/cmpcon.1994.282894","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cmpcon.1994.282894","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of COMPCON '94","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030378677","display_name":"S. Gary","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"S. Gary","raw_affiliation_strings":["Somerset Design Center, Motorola, Incorporated, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Somerset Design Center, Motorola, Incorporated, Austin, TX, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5107846572","display_name":"C. Dietz","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Dietz","raw_affiliation_strings":["Somerset Design Center, International Business Machines Corporation, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Somerset Design Center, International Business Machines Corporation, Austin, TX, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062738041","display_name":"J. Eno","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Eno","raw_affiliation_strings":["Somerset Design Center, Motorola, Incorporated, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Somerset Design Center, Motorola, Incorporated, Austin, TX, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111641823","display_name":"G. Gerosa","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Gerosa","raw_affiliation_strings":["Somerset Design Center, Motorola, Incorporated, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Somerset Design Center, Motorola, Incorporated, Austin, TX, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100400977","display_name":"Sung Min Park","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sung Park","raw_affiliation_strings":["Somerset Design Center, International Business Machines Corporation, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Somerset Design Center, International Business Machines Corporation, Austin, TX, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051279539","display_name":"H. Sanchez","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H. Sanchez","raw_affiliation_strings":["Somerset Design Center, Motorola, Incorporated, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Somerset Design Center, Motorola, Incorporated, Austin, TX, USA","institution_ids":["https://openalex.org/I1333370159"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5030378677"],"corresponding_institution_ids":["https://openalex.org/I1333370159"],"apc_list":null,"apc_paid":null,"fwci":1.0426,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.78278735,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"307","last_page":"315"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/powerpc","display_name":"PowerPC","score":0.9962206482887268},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.8392754197120667},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.670376718044281},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5995299816131592},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4960709512233734},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4772910177707672},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4247342348098755},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.41100814938545227},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3844367563724518},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.34651410579681396},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.31433188915252686},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.10198327898979187},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.08901700377464294},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08802485466003418},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.07295319437980652}],"concepts":[{"id":"https://openalex.org/C56005371","wikidata":"https://www.wikidata.org/wiki/Q209860","display_name":"PowerPC","level":3,"score":0.9962206482887268},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.8392754197120667},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.670376718044281},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5995299816131592},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4960709512233734},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4772910177707672},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4247342348098755},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.41100814938545227},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3844367563724518},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.34651410579681396},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.31433188915252686},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.10198327898979187},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.08901700377464294},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08802485466003418},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.07295319437980652},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/cmpcon.1994.282894","is_oa":false,"landing_page_url":"https://doi.org/10.1109/cmpcon.1994.282894","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of COMPCON '94","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2534729072","https://openalex.org/W2542684619"],"related_works":["https://openalex.org/W2127399338","https://openalex.org/W2175023340","https://openalex.org/W2147297306","https://openalex.org/W2053532302","https://openalex.org/W1854252461","https://openalex.org/W2185351929","https://openalex.org/W2983079487","https://openalex.org/W1972953980","https://openalex.org/W2355970714","https://openalex.org/W2050988079"],"abstract_inverted_index":{"The":[0,12,40],"PowerPC":[1,10],"603":[2,41,83],"microprocessor":[3,92],"is":[4,46],"a":[5],"low-power":[6,31],"implementation":[7],"of":[8,19,29,48,71],"the":[9,64,82],"architecture.":[11],"superscalar":[13],"organization":[14],"includes":[15],"dynamic":[16],"localized":[17],"shutdown":[18],"execution":[20],"units":[21],"to":[22,68],"reduce":[23],"normal-mode":[24],"power":[25,38,73,86],"consumption.":[26],"Three":[27],"levels":[28],"static":[30],"operation":[32],"are":[33],"software":[34],"programmable":[35],"for":[36,84,94],"system":[37,65,72],"management.":[39],"PLL":[42],"(phase":[43],"lock":[44],"loop)":[45],"capable":[47],"generating":[49],"an":[50,90],"internal":[51],"processor":[52,76],"clock":[53,66],"at":[54],"1/spl":[55],"times/,":[56,58],"2/spl":[57],"3/spl":[59],"times/":[60,63],"or":[61],"4/spl":[62],"speed":[67],"allow":[69],"control":[70],"while":[74],"maintaining":[75],"performance.":[77],"Various":[78],"design":[79],"features":[80],"optimize":[81],"both":[85],"and":[87],"performance,":[88],"creating":[89],"ideal":[91],"solution":[93],"portable":[95],"applications.<":[96],"<ETX":[97],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[98],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">&gt;</ETX>":[99]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-10T16:38:18.471706","created_date":"2025-10-10T00:00:00"}