{"id":"https://openalex.org/W1997318576","doi":"https://doi.org/10.1109/ccece.2014.6901052","title":"Testing current mode two-input logic gates","display_name":"Testing current mode two-input logic gates","publication_year":2014,"publication_date":"2014-05-01","ids":{"openalex":"https://openalex.org/W1997318576","doi":"https://doi.org/10.1109/ccece.2014.6901052","mag":"1997318576"},"language":"en","primary_location":{"id":"doi:10.1109/ccece.2014.6901052","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccece.2014.6901052","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 27th Canadian Conference on Electrical and Computer Engineering (CCECE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073702088","display_name":"Sherif Amer","orcid":null},"institutions":[{"id":"https://openalex.org/I80693520","display_name":"American University in Cairo","ror":"https://ror.org/0176yqn58","country_code":"EG","type":"education","lineage":["https://openalex.org/I80693520"]}],"countries":["EG"],"is_corresponding":true,"raw_author_name":"S.H. Amer","raw_affiliation_strings":["Electronics Engineering Department, American University in Cairo, Cairo, Egypt","[Electronics Engineering Department, American University in Cairo, Egypt]"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department, American University in Cairo, Cairo, Egypt","institution_ids":["https://openalex.org/I80693520"]},{"raw_affiliation_string":"[Electronics Engineering Department, American University in Cairo, Egypt]","institution_ids":["https://openalex.org/I80693520"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034596339","display_name":"Ahmed S. Emara","orcid":"https://orcid.org/0000-0002-7329-7795"},"institutions":[{"id":"https://openalex.org/I80693520","display_name":"American University in Cairo","ror":"https://ror.org/0176yqn58","country_code":"EG","type":"education","lineage":["https://openalex.org/I80693520"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"A.S. Emara","raw_affiliation_strings":["Electronics Engineering Department, American University in Cairo, Cairo, Egypt","[Electronics Engineering Department, American University in Cairo, Egypt]"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department, American University in Cairo, Cairo, Egypt","institution_ids":["https://openalex.org/I80693520"]},{"raw_affiliation_string":"[Electronics Engineering Department, American University in Cairo, Egypt]","institution_ids":["https://openalex.org/I80693520"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079149931","display_name":"R. Mohie El-Din","orcid":null},"institutions":[{"id":"https://openalex.org/I80693520","display_name":"American University in Cairo","ror":"https://ror.org/0176yqn58","country_code":"EG","type":"education","lineage":["https://openalex.org/I80693520"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"R. Mohie El-Din","raw_affiliation_strings":["Electronics Engineering Department, American University in Cairo, Cairo, Egypt","[Electronics Engineering Department, American University in Cairo, Egypt]"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department, American University in Cairo, Cairo, Egypt","institution_ids":["https://openalex.org/I80693520"]},{"raw_affiliation_string":"[Electronics Engineering Department, American University in Cairo, Egypt]","institution_ids":["https://openalex.org/I80693520"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010570894","display_name":"Mohamed Mostafa Fouad","orcid":null},"institutions":[{"id":"https://openalex.org/I145487455","display_name":"Cairo University","ror":"https://ror.org/03q21mh05","country_code":"EG","type":"education","lineage":["https://openalex.org/I145487455"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"M.M. Fouad","raw_affiliation_strings":["Electronics and Communications Department, Cairo University, Cairo, Egypt","[Electronics and Communications Department, Cairo University, Egypt]"],"affiliations":[{"raw_affiliation_string":"Electronics and Communications Department, Cairo University, Cairo, Egypt","institution_ids":["https://openalex.org/I145487455"]},{"raw_affiliation_string":"[Electronics and Communications Department, Cairo University, Egypt]","institution_ids":["https://openalex.org/I145487455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035566088","display_name":"Ahmed H. Madian","orcid":"https://orcid.org/0000-0001-8313-8088"},"institutions":[{"id":"https://openalex.org/I3089115","display_name":"Egyptian Atomic Energy Authority","ror":"https://ror.org/04hd0yz67","country_code":"EG","type":"government","lineage":["https://openalex.org/I3089115"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"A.H. Madian","raw_affiliation_strings":["Radiation Engineering Department, Egyptian Atomic Energy Authority, Cairo, Egypt","Radiation Engineering Department ,Egyptian Atomic Energy Authority Cairo, Egypt"],"affiliations":[{"raw_affiliation_string":"Radiation Engineering Department, Egyptian Atomic Energy Authority, Cairo, Egypt","institution_ids":["https://openalex.org/I3089115"]},{"raw_affiliation_string":"Radiation Engineering Department ,Egyptian Atomic Energy Authority Cairo, Egypt","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109553881","display_name":"Hassanein H. Amer","orcid":null},"institutions":[{"id":"https://openalex.org/I80693520","display_name":"American University in Cairo","ror":"https://ror.org/0176yqn58","country_code":"EG","type":"education","lineage":["https://openalex.org/I80693520"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"H.H. Amer","raw_affiliation_strings":["Electronics Engineering Department, American University in Cairo, Cairo, Egypt","[Electronics Engineering Department, American University in Cairo, Egypt]"],"affiliations":[{"raw_affiliation_string":"Electronics Engineering Department, American University in Cairo, Cairo, Egypt","institution_ids":["https://openalex.org/I80693520"]},{"raw_affiliation_string":"[Electronics Engineering Department, American University in Cairo, Egypt]","institution_ids":["https://openalex.org/I80693520"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006235823","display_name":"M. B. Abdelhalim","orcid":"https://orcid.org/0000-0002-1803-6349"},"institutions":[{"id":"https://openalex.org/I59272784","display_name":"Arab Academy for Science, Technology, and Maritime Transport","ror":"https://ror.org/0004vyj87","country_code":"EG","type":"education","lineage":["https://openalex.org/I59272784"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"M.B. Abdelhalim","raw_affiliation_strings":["College of Computing and Information technology, AASTMT, Cairo, Egypt"],"affiliations":[{"raw_affiliation_string":"College of Computing and Information technology, AASTMT, Cairo, Egypt","institution_ids":["https://openalex.org/I59272784"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090381450","display_name":"H. H. Draz","orcid":"https://orcid.org/0000-0001-9721-8206"},"institutions":[{"id":"https://openalex.org/I145487455","display_name":"Cairo University","ror":"https://ror.org/03q21mh05","country_code":"EG","type":"education","lineage":["https://openalex.org/I145487455"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"H.H. Draz","raw_affiliation_strings":["Electronics and Communications Department, Cairo University, Cairo, Egypt","[Electronics and Communications Department, Cairo University, Egypt]"],"affiliations":[{"raw_affiliation_string":"Electronics and Communications Department, Cairo University, Cairo, Egypt","institution_ids":["https://openalex.org/I145487455"]},{"raw_affiliation_string":"[Electronics and Communications Department, Cairo University, Egypt]","institution_ids":["https://openalex.org/I145487455"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5073702088"],"corresponding_institution_ids":["https://openalex.org/I80693520"],"apc_list":null,"apc_paid":null,"fwci":3.0648,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.91130034,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.9624546766281128},{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.8726037740707397},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.7208444476127625},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.7161007523536682},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6862722635269165},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5048275589942932},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.50054931640625},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4962237477302551},{"id":"https://openalex.org/keywords/and-or-invert","display_name":"AND-OR-Invert","score":0.4685284495353699},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3220985531806946},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.31994667649269104},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3192177414894104},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21237796545028687}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.9624546766281128},{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.8726037740707397},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.7208444476127625},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.7161007523536682},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6862722635269165},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5048275589942932},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.50054931640625},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4962237477302551},{"id":"https://openalex.org/C130126468","wikidata":"https://www.wikidata.org/wiki/Q4652943","display_name":"AND-OR-Invert","level":5,"score":0.4685284495353699},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3220985531806946},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.31994667649269104},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3192177414894104},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21237796545028687}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ccece.2014.6901052","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccece.2014.6901052","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 27th Canadian Conference on Electrical and Computer Engineering (CCECE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6899999976158142,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1535414921","https://openalex.org/W1564201208","https://openalex.org/W1577427218","https://openalex.org/W1964060596","https://openalex.org/W2006778762","https://openalex.org/W2067323993","https://openalex.org/W2105290633","https://openalex.org/W2121604406","https://openalex.org/W2138536155","https://openalex.org/W2141981731","https://openalex.org/W2154763313","https://openalex.org/W2157024459","https://openalex.org/W2163272875","https://openalex.org/W2534192050","https://openalex.org/W3103339143","https://openalex.org/W3147616483","https://openalex.org/W6675628525"],"related_works":["https://openalex.org/W2186697267","https://openalex.org/W4256346094","https://openalex.org/W2789662562","https://openalex.org/W2478796561","https://openalex.org/W4200480997","https://openalex.org/W2162682531","https://openalex.org/W91469557","https://openalex.org/W4214735176","https://openalex.org/W4245780952","https://openalex.org/W2601542976"],"abstract_inverted_index":{"This":[0],"paper":[1],"focuses":[2],"on":[3,46],"the":[4,13,34,47,60,65,75,82,89,95],"production":[5],"testing":[6],"of":[7,33,62],"current":[8],"mode":[9],"logic":[10,36,83],"gates":[11,18],"using":[12],"45nm":[14],"technology.":[15],"Two-input":[16],"elementary":[17],"are":[19],"studied":[20],"assuming":[21],"five":[22],"faults":[23,63,80,87],"per":[24],"transistor.":[25,98],"It":[26],"is":[27,57,70],"shown":[28],"that":[29,59,74,78],"two":[30],"different":[31,41],"implementations":[32],"same":[35],"function":[37],"might":[38],"result":[39],"in":[40,53,64,81,88],"minimum":[42],"test":[43,76],"sets":[44],"depending":[45],"transistor":[48],"level":[49],"architecture.":[50],"In":[51],"addition,":[52],"MCML":[54],"gates,":[55],"it":[56],"observed":[58],"detection":[61],"upper":[66],"PMOS":[67],"load":[68,90],"transistors":[69,91],"time":[71],"dependent":[72],"and":[73],"vectors":[77],"detect":[79,86],"network":[84],"also":[85],"as":[92,94],"well":[93],"tail":[96],"NMOS":[97]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":5},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-25T21:42:39.735039","created_date":"2025-10-10T00:00:00"}