{"id":"https://openalex.org/W2477062664","doi":"https://doi.org/10.1109/ccece.2014.6900946","title":"Programmable counter based approach to intellectual property protection in sequential circuits and comparison with existing approach","display_name":"Programmable counter based approach to intellectual property protection in sequential circuits and comparison with existing approach","publication_year":2014,"publication_date":"2014-05-01","ids":{"openalex":"https://openalex.org/W2477062664","doi":"https://doi.org/10.1109/ccece.2014.6900946","mag":"2477062664"},"language":"en","primary_location":{"id":"doi:10.1109/ccece.2014.6900946","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccece.2014.6900946","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 27th Canadian Conference on Electrical and Computer Engineering (CCECE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049434448","display_name":"Siddhant Malik","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Siddhant Malik","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5049434448"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.23822785,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6534340381622314},{"id":"https://openalex.org/keywords/intellectual-property","display_name":"Intellectual property","score":0.6021360754966736},{"id":"https://openalex.org/keywords/property","display_name":"Property (philosophy)","score":0.5326976776123047},{"id":"https://openalex.org/keywords/industrial-property","display_name":"Industrial property","score":0.5152995586395264},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.49518004059791565},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4194675087928772},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.20804330706596375},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1459919512271881},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14463037252426147}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6534340381622314},{"id":"https://openalex.org/C34974158","wikidata":"https://www.wikidata.org/wiki/Q131257","display_name":"Intellectual property","level":2,"score":0.6021360754966736},{"id":"https://openalex.org/C189950617","wikidata":"https://www.wikidata.org/wiki/Q937228","display_name":"Property (philosophy)","level":2,"score":0.5326976776123047},{"id":"https://openalex.org/C2778419888","wikidata":"https://www.wikidata.org/wiki/Q2750057","display_name":"Industrial property","level":3,"score":0.5152995586395264},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.49518004059791565},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4194675087928772},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.20804330706596375},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1459919512271881},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14463037252426147},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ccece.2014.6900946","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ccece.2014.6900946","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 27th Canadian Conference on Electrical and Computer Engineering (CCECE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2009488097","https://openalex.org/W2114336390","https://openalex.org/W2115778513","https://openalex.org/W2116590916","https://openalex.org/W2171734454","https://openalex.org/W2539828507","https://openalex.org/W4230572467","https://openalex.org/W4236413535"],"related_works":["https://openalex.org/W244107939","https://openalex.org/W255582495","https://openalex.org/W3005510920","https://openalex.org/W2810079522","https://openalex.org/W2362725074","https://openalex.org/W4239545765","https://openalex.org/W3208508403","https://openalex.org/W1991079443","https://openalex.org/W2119914337","https://openalex.org/W2052574908"],"abstract_inverted_index":{"This":[0],"DOI":[1],"was":[2],"registered":[3],"to":[4,18],"an":[5],"article":[6,21],"that":[7,29],"will":[8],"not":[9],"be":[10],"disseminated":[11],"via":[12],"IEEE":[13,15],"Xplore.":[14],"has":[16],"chosen":[17],"exclude":[19],"this":[20],"from":[22],"distribution":[23],"after":[24],"the":[25,32],"conference":[26],"for":[27],"reasons":[28],"fall":[30],"within":[31],"guidelines":[33],"specified":[34],"in":[35],"section":[36],"8.2.1.B.13":[37],"of":[38],"IEEE's":[39],"\"Publication":[40],"Services":[41],"and":[42],"Products":[43],"Board":[44],"Operations":[45],"Manual.\"":[46],"We":[47],"regret":[48],"any":[49],"inconvenience.":[50]},"counts_by_year":[],"updated_date":"2026-02-20T08:17:22.645390","created_date":"2025-10-10T00:00:00"}