{"id":"https://openalex.org/W1723195210","doi":"https://doi.org/10.1109/ats.1995.485323","title":"Serial transistor network modeling for bridging fault simulation","display_name":"Serial transistor network modeling for bridging fault simulation","publication_year":2002,"publication_date":"2002-11-19","ids":{"openalex":"https://openalex.org/W1723195210","doi":"https://doi.org/10.1109/ats.1995.485323","mag":"1723195210"},"language":"en","primary_location":{"id":"doi:10.1109/ats.1995.485323","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats.1995.485323","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Fourth Asian Test Symposium","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069159925","display_name":"M. Renovell","orcid":"https://orcid.org/0000-0002-3896-8231"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I19894307","display_name":"Universit\u00e9 de Montpellier","ror":"https://ror.org/051escj72","country_code":"FR","type":"education","lineage":["https://openalex.org/I19894307"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"M. Renovell","raw_affiliation_strings":["Laboratoire dInformatique, Robotique et Micro\u00e9lectronique de Montpellier (LIRM) UMR 9928 CNRS, Sciences et Techniques du Languedoc, Universit\u00e9 de Montpellier II, Montpellier, France","Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire dInformatique, Robotique et Micro\u00e9lectronique de Montpellier (LIRM) UMR 9928 CNRS, Sciences et Techniques du Languedoc, Universit\u00e9 de Montpellier II, Montpellier, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I19894307","https://openalex.org/I4210101743"]},{"raw_affiliation_string":"Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France","institution_ids":["https://openalex.org/I4210101743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050962314","display_name":"P. Huc","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I19894307","display_name":"Universit\u00e9 de Montpellier","ror":"https://ror.org/051escj72","country_code":"FR","type":"education","lineage":["https://openalex.org/I19894307"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"P. Huc","raw_affiliation_strings":["Laboratoire dInformatique, Robotique et Micro\u00e9lectronique de Montpellier (LIRM) UMR 9928 CNRS, Sciences et Techniques du Languedoc, Universit\u00e9 de Montpellier II, Montpellier, France","Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire dInformatique, Robotique et Micro\u00e9lectronique de Montpellier (LIRM) UMR 9928 CNRS, Sciences et Techniques du Languedoc, Universit\u00e9 de Montpellier II, Montpellier, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I19894307","https://openalex.org/I4210101743"]},{"raw_affiliation_string":"Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France","institution_ids":["https://openalex.org/I4210101743"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5106479024","display_name":"Yves Bertrand","orcid":"https://orcid.org/0000-0003-4693-1671"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I19894307","display_name":"Universit\u00e9 de Montpellier","ror":"https://ror.org/051escj72","country_code":"FR","type":"education","lineage":["https://openalex.org/I19894307"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Y. Bertrand","raw_affiliation_strings":["Laboratoire dInformatique, Robotique et Micro\u00e9lectronique de Montpellier (LIRM) UMR 9928 CNRS, Sciences et Techniques du Languedoc, Universit\u00e9 de Montpellier II, Montpellier, France","Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratoire dInformatique, Robotique et Micro\u00e9lectronique de Montpellier (LIRM) UMR 9928 CNRS, Sciences et Techniques du Languedoc, Universit\u00e9 de Montpellier II, Montpellier, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I19894307","https://openalex.org/I4210101743"]},{"raw_affiliation_string":"Lab. d'Inf., Robotique et Microelectron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France","institution_ids":["https://openalex.org/I4210101743"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1909,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.35462703,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"100","last_page":"106"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bridging","display_name":"Bridging (networking)","score":0.835068941116333},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.7810084819793701},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6241953372955322},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.46262168884277344},{"id":"https://openalex.org/keywords/fault-model","display_name":"Fault model","score":0.45661136507987976},{"id":"https://openalex.org/keywords/transistor-model","display_name":"Transistor model","score":0.45446956157684326},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35212892293930054},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27430790662765503},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19190263748168945},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.16539540886878967},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.13518700003623962},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.06470546126365662}],"concepts":[{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.835068941116333},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.7810084819793701},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6241953372955322},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.46262168884277344},{"id":"https://openalex.org/C167391956","wikidata":"https://www.wikidata.org/wiki/Q1401211","display_name":"Fault model","level":3,"score":0.45661136507987976},{"id":"https://openalex.org/C150169584","wikidata":"https://www.wikidata.org/wiki/Q7834319","display_name":"Transistor model","level":4,"score":0.45446956157684326},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35212892293930054},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27430790662765503},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19190263748168945},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.16539540886878967},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.13518700003623962},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.06470546126365662},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ats.1995.485323","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ats.1995.485323","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Fourth Asian Test Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/16","display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1573827634","https://openalex.org/W1652447308","https://openalex.org/W1896671528","https://openalex.org/W1961775031","https://openalex.org/W1967417417","https://openalex.org/W2121983692","https://openalex.org/W2123181463","https://openalex.org/W2133154543","https://openalex.org/W2142030290","https://openalex.org/W2145391891","https://openalex.org/W2154418718","https://openalex.org/W2154446644","https://openalex.org/W2161343773","https://openalex.org/W3139599180","https://openalex.org/W4255251068"],"related_works":["https://openalex.org/W1989891105","https://openalex.org/W2103773526","https://openalex.org/W2901469270","https://openalex.org/W2098335643","https://openalex.org/W2139357225","https://openalex.org/W2161299897","https://openalex.org/W3173836265","https://openalex.org/W2066671769","https://openalex.org/W4289106041","https://openalex.org/W2953198199"],"abstract_inverted_index":{"The":[0,68],"most":[1],"recent":[2],"bridging":[3,109,131,142,170],"fault":[4,21,46,94,110,132,143,171],"models,":[5],"the":[6,9,14,30,37,76,93,124,152,155,160,166,169],"voting":[7,11,153,157],"and":[8,56,88],"biased":[10,156],"model":[12,102,113,148,158],"use":[13,77],"concept":[15,49],"of":[16,33,71,78,162,168],"relative":[17,31,69],"transistor":[18,55,58,64,73,105,121,135],"strength":[19,32,70],"during":[20,45],"simulation.":[22,47,111,172],"A":[23],"SPICE":[24],"pre-simulation":[25],"allows":[26,114],"one":[27,115],"to":[28,116,123],"determine":[29],"unit":[34],"dimension":[35],"transistors;":[36],"results":[38],"stored":[39],"in":[40],"tables":[41,80,164],"are":[42,66],"then":[43],"used":[44,149],"This":[48,97,112,147],"is":[50],"very":[51],"efficient":[52],"for":[53,103],"single":[54,120,145],"parallel":[57],"networks":[59,65,74,106],"but":[60],"suffers":[61],"when":[62],"serial":[63,72,86,104,125],"considered.":[67],"implies":[75],"many":[79],"(for":[81],"2,":[82],"3,":[83],"4,":[84],"...":[85],"n":[87],"p":[89],"transistors)":[90],"slowing":[91],"down":[92],"simulation":[95],"procedure.":[96],"paper":[98],"presents":[99],"a":[100,119,141],"new":[101],"which":[107],"accelerates":[108],"easily":[117],"define":[118],"equivalent":[122],"network.":[126],"In":[127],"this":[128],"way,":[129],"any":[130,134],"involving":[133,144],"network":[136],"can":[137],"be":[138],"considered":[139],"as":[140],"transistors.":[146],"with":[150],"either":[151],"or":[154],"decreases":[159],"number":[161],"required":[163],"increasing":[165],"efficiency":[167]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}