{"id":"https://openalex.org/W3146163470","doi":"https://doi.org/10.1109/aspdac.2006.1594646","title":"Robust analytical gate delay modeling for low voltage circuits","display_name":"Robust analytical gate delay modeling for low voltage circuits","publication_year":2006,"publication_date":"2006-03-22","ids":{"openalex":"https://openalex.org/W3146163470","doi":"https://doi.org/10.1109/aspdac.2006.1594646","mag":"3146163470"},"language":"en","primary_location":{"id":"doi:10.1109/aspdac.2006.1594646","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2006.1594646","pdf_url":null,"source":{"id":"https://openalex.org/S4363608292","display_name":"Asia and South Pacific Conference on Design Automation, 2006.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Asia and South Pacific Conference on Design Automation, 2006.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078157032","display_name":"Anand Ramalingam","orcid":"https://orcid.org/0000-0003-1800-1020"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"A. Ramalingam","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Technology, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Technology, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066323193","display_name":"Sreekumar V. Kodakara","orcid":null},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.V. Kodakara","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109214925","display_name":"A. Devgan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"A. Devgan","raw_affiliation_strings":["Magma Design Automation, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Magma Design Automation, Austin, TX, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011883763","display_name":"David Z. Pan","orcid":"https://orcid.org/0000-0002-5705-2501"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.Z. Pan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Technology, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Technology, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5078157032"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":1.2303,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.78480103,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"61","last_page":"66"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.829939603805542},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6997577548027039},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.585864245891571},{"id":"https://openalex.org/keywords/centroid","display_name":"Centroid","score":0.5258774757385254},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.521784782409668},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.48812708258628845},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.48594677448272705},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.466008722782135},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4507002830505371},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.4155120253562927},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3916535973548889},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.350345641374588},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3384423851966858},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.26884448528289795},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21102052927017212},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1634785532951355}],"concepts":[{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.829939603805542},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6997577548027039},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.585864245891571},{"id":"https://openalex.org/C146599234","wikidata":"https://www.wikidata.org/wiki/Q511093","display_name":"Centroid","level":2,"score":0.5258774757385254},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.521784782409668},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.48812708258628845},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.48594677448272705},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.466008722782135},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4507002830505371},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.4155120253562927},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3916535973548889},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.350345641374588},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3384423851966858},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.26884448528289795},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21102052927017212},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1634785532951355},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aspdac.2006.1594646","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aspdac.2006.1594646","pdf_url":null,"source":{"id":"https://openalex.org/S4363608292","display_name":"Asia and South Pacific Conference on Design Automation, 2006.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Asia and South Pacific Conference on Design Automation, 2006.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1502531259","https://openalex.org/W1977963257","https://openalex.org/W1984588379","https://openalex.org/W2018785091","https://openalex.org/W2104487433","https://openalex.org/W2123692429","https://openalex.org/W2133365606","https://openalex.org/W2134067926","https://openalex.org/W2145750057","https://openalex.org/W2153558271","https://openalex.org/W2154363431","https://openalex.org/W2154941994","https://openalex.org/W2163626738","https://openalex.org/W2164759949","https://openalex.org/W4210341450","https://openalex.org/W4236005074","https://openalex.org/W4247380242","https://openalex.org/W4247970051","https://openalex.org/W6829636747"],"related_works":["https://openalex.org/W2170979950","https://openalex.org/W2572576974","https://openalex.org/W1900707063","https://openalex.org/W3008786049","https://openalex.org/W98453623","https://openalex.org/W2039177842","https://openalex.org/W2081082331","https://openalex.org/W2136396860","https://openalex.org/W2769457990","https://openalex.org/W4281385583"],"abstract_inverted_index":{"Sakurai-Newton":[0],"(SN)":[1],"delay":[2,12,70,94],"metric":[3,13,31,71,81,110,144,172],"(Sakurai,":[4],"1990)":[5],"is":[6,82,95,133,162,189],"a":[7,66,112,146,177,184],"widely":[8],"used":[9],"closed":[10,68,186],"form":[11,69],"for":[14,165],"CMOS":[15,40,158],"gates":[16,41],"because":[17],"of":[18,76,106,180],"simplicity":[19],"and":[20,37,88,156,160,196],"reasonable":[21],"accuracy.":[22],"Nevertheless":[23],"it":[24,48,161,188],"can":[25,100],"be":[26,51,101],"shown":[27],"that":[28,91],"the":[29,74,92,104,122,127,142,154,157],"SN":[30,93,143],"fails":[32],"to":[33,192],"provide":[34],"high":[35,114,131,174],"accuracy":[36],"fidelity":[38,175],"when":[39,119],"operate":[42],"at":[43],"low":[44,55,194,197],"supply":[45,167,181],"voltages.":[46,168],"Thus":[47],"may":[49],"not":[50],"applicable":[52],"in":[53],"many":[54],"power":[56,77,198],"applications":[57],"with":[58,121],"voltage":[59,195],"scaling.":[60],"In":[61,140],"this":[62],"paper,":[63],"we":[64],"propose":[65],"new":[67,80],"based":[72],"on":[73],"centroid":[75,105],"dissipation.":[78],"This":[79],"inspired":[83],"by":[84],"our":[85,170],"key":[86],"observation":[87],"theoretic":[89],"proof":[90],"indeed":[96],"Elmore":[97],"delay,":[98],"which":[99],"viewed":[102],"as":[103],"current.":[107],"Our":[108],"proposed":[109,171],"has":[111,145,173],"very":[113,190],"correlation":[115,132,147],"coefficient":[116,148],"(ges":[117],"0.98)":[118],"correlated":[120],"actual":[123],"delays":[124],"got":[125],"from":[126],"HSPICE":[128],"simulations.":[129],"Such":[130],"consistent":[134],"across":[135,176],"all":[136],"major":[137],"process":[138],"technologies.":[139],"comparison,":[141],"between":[149],"(0.70,":[150],"0.90)":[151],"depending":[152],"upon":[153],"technology":[155],"gate,":[159],"less":[163],"accurate":[164],"lower":[166],"Since":[169],"wide":[178],"range":[179],"voltages":[182],"yet":[183],"simple":[185],"form,":[187],"useful":[191],"guide":[193],"designs":[199]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
