{"id":"https://openalex.org/W2089377260","doi":"https://doi.org/10.1109/asicon.2011.6157194","title":"Through-Silicon-Via assignment for 3D ICs","display_name":"Through-Silicon-Via assignment for 3D ICs","publication_year":2011,"publication_date":"2011-10-01","ids":{"openalex":"https://openalex.org/W2089377260","doi":"https://doi.org/10.1109/asicon.2011.6157194","mag":"2089377260"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2011.6157194","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157194","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044872919","display_name":"Jianchang Ao","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jianchang Ao","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China","Department of Computer Science and Technology,Tsinghua Univ,Beijing 100084,China)"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Department of Computer Science and Technology,Tsinghua Univ,Beijing 100084,China)","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110158438","display_name":"Sheqin Dong","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Sheqin Dong","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China","Department of Computer Science and Technology,Tsinghua Univ,Beijing 100084,China)"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Department of Computer Science and Technology,Tsinghua Univ,Beijing 100084,China)","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100423614","display_name":"Song Chen","orcid":"https://orcid.org/0000-0003-0341-3428"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Song Chen","raw_affiliation_strings":["Graduate School of IPS, Waseda University, Kitakyushu, Japan","Graduate School of IPS, Waseda University Kitakyushu-shi, 808-0135 Japan"],"affiliations":[{"raw_affiliation_string":"Graduate School of IPS, Waseda University, Kitakyushu, Japan","institution_ids":["https://openalex.org/I150744194"]},{"raw_affiliation_string":"Graduate School of IPS, Waseda University Kitakyushu-shi, 808-0135 Japan","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113675244","display_name":"Satoshi Goto","orcid":null},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Satoshi Goto","raw_affiliation_strings":["Graduate School of IPS, Waseda University, Kitakyushu, Japan","Graduate School of IPS, Waseda University Kitakyushu-shi, 808-0135 Japan"],"affiliations":[{"raw_affiliation_string":"Graduate School of IPS, Waseda University, Kitakyushu, Japan","institution_ids":["https://openalex.org/I150744194"]},{"raw_affiliation_string":"Graduate School of IPS, Waseda University Kitakyushu-shi, 808-0135 Japan","institution_ids":["https://openalex.org/I150744194"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5044872919"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.13153148,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"353","last_page":"356"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10783","display_name":"Additive Manufacturing and 3D Printing Technologies","score":0.9919000267982483,"subfield":{"id":"https://openalex.org/subfields/2203","display_name":"Automotive Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9915000200271606,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.8857879042625427},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.8797848224639893},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7310092449188232},{"id":"https://openalex.org/keywords/simulated-annealing","display_name":"Simulated annealing","score":0.6342769861221313},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6104550361633301},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.6094033718109131},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.6001222133636475},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.4895254373550415},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.4663262665271759},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4467568099498749},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4389411509037018},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4104493260383606},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.31843653321266174},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.2037988305091858},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20248186588287354},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14630126953125},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.13790583610534668},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.10912060737609863}],"concepts":[{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.8857879042625427},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.8797848224639893},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7310092449188232},{"id":"https://openalex.org/C126980161","wikidata":"https://www.wikidata.org/wiki/Q863783","display_name":"Simulated annealing","level":2,"score":0.6342769861221313},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6104550361633301},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.6094033718109131},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.6001222133636475},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.4895254373550415},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.4663262665271759},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4467568099498749},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4389411509037018},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4104493260383606},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.31843653321266174},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.2037988305091858},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20248186588287354},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14630126953125},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.13790583610534668},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.10912060737609863},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2011.6157194","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157194","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5199999809265137}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2108742647","https://openalex.org/W2114542420","https://openalex.org/W2144149750","https://openalex.org/W2151542687","https://openalex.org/W2151734895","https://openalex.org/W2168938583","https://openalex.org/W4235066485","https://openalex.org/W4253549065","https://openalex.org/W6684891719"],"related_works":["https://openalex.org/W2027159884","https://openalex.org/W1990828594","https://openalex.org/W2089377260","https://openalex.org/W2046139226","https://openalex.org/W2513353273","https://openalex.org/W2549021975","https://openalex.org/W2333804548","https://openalex.org/W4399621287","https://openalex.org/W1968957853","https://openalex.org/W2142764951"],"abstract_inverted_index":{"Three-dimensional":[0],"integrated":[1],"circuits":[2],"(3D":[3],"ICs)":[4],"can":[5],"alleviate":[6],"the":[7,12,35,57,62,76,79],"interconnect":[8],"problem":[9],"coming":[10],"with":[11],"decreasing":[13],"feature":[14],"size":[15],"and":[16,20,69],"increasing":[17],"integration":[18],"density,":[19],"promise":[21],"a":[22,39,50],"solution":[23],"to":[24,55],"heterogeneous":[25],"integration.":[26],"The":[27,72],"inter-layer":[28],"connection,":[29],"which":[30],"is":[31,38],"generally":[32],"implemented":[33],"by":[34],"Through-Silicon-Via":[36],"(TSV),":[37],"key":[40],"technology":[41,54],"for":[42],"3D":[43,67,70],"ICs.":[44],"In":[45],"this":[46],"paper,":[47],"we":[48],"propose":[49],"unified":[51],"simulated":[52],"annealing":[53],"tackle":[56],"TSV":[58,64],"assignment":[59,65],"problem,":[60],"including":[61],"signal":[63],"of":[66,78],"nets":[68],"buses.":[71],"experiment":[73],"results":[74],"show":[75],"effective":[77],"method.":[80]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}