{"id":"https://openalex.org/W2017025979","doi":"https://doi.org/10.1109/asicon.2011.6157155","title":"A NoC-based multi-core architecture for IEEE 802.11i CCMP","display_name":"A NoC-based multi-core architecture for IEEE 802.11i CCMP","publication_year":2011,"publication_date":"2011-10-01","ids":{"openalex":"https://openalex.org/W2017025979","doi":"https://doi.org/10.1109/asicon.2011.6157155","mag":"2017025979"},"language":"en","primary_location":{"id":"doi:10.1109/asicon.2011.6157155","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157155","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100421770","display_name":"Yang Li","orcid":"https://orcid.org/0000-0003-2845-5739"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yang Li","raw_affiliation_strings":["State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China"],"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066674438","display_name":"Jun Han","orcid":"https://orcid.org/0000-0002-5245-0754"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jun Han","raw_affiliation_strings":["State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China"],"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100328249","display_name":"Shuai Wang","orcid":"https://orcid.org/0009-0000-0481-4974"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuai Wang","raw_affiliation_strings":["State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China"],"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100837685","display_name":"Junbao Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junbao Liu","raw_affiliation_strings":["State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China"],"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5006214126","display_name":"Xiaoyang Zeng","orcid":"https://orcid.org/0009-0001-9928-8782"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoyang Zeng","raw_affiliation_strings":["State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China"],"affiliations":[{"raw_affiliation_string":"State-Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"State-Key Lab of ASIC and System, Fudan University, Shanghai 201203, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100421770"],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.11967771,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"196","last_page":"199"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9764999747276306,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10796","display_name":"Cooperative Communication and Network Coding","score":0.9587000012397766,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7481606006622314},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6683276891708374},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5770902037620544},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5287979245185852},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.497819185256958},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4876664876937866},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.48111552000045776},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.4280489385128021},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.42233967781066895},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.37361669540405273},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14585930109024048},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14115649461746216},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.12593933939933777},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.08329251408576965},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.061217695474624634}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7481606006622314},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6683276891708374},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5770902037620544},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5287979245185852},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.497819185256958},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4876664876937866},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.48111552000045776},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.4280489385128021},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.42233967781066895},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37361669540405273},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14585930109024048},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14115649461746216},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.12593933939933777},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.08329251408576965},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.061217695474624634},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asicon.2011.6157155","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asicon.2011.6157155","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 9th IEEE International Conference on ASIC","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W329998640","https://openalex.org/W1584106892","https://openalex.org/W2032798087","https://openalex.org/W2080813565","https://openalex.org/W2089155985","https://openalex.org/W2131722332","https://openalex.org/W2135682235","https://openalex.org/W2150010995"],"related_works":["https://openalex.org/W122453572","https://openalex.org/W2057234250","https://openalex.org/W2351011383","https://openalex.org/W4221002079","https://openalex.org/W2162875803","https://openalex.org/W1757458251","https://openalex.org/W2146879484","https://openalex.org/W2141090099","https://openalex.org/W2763248686","https://openalex.org/W2045325972"],"abstract_inverted_index":{"To":[0],"enhance":[1],"security":[2,31],"in":[3,8,45,54,63],"WLAN,":[4],"CCMP":[5,24,55],"is":[6,43,56],"introduced":[7],"IEEE":[9],"802.11i.":[10],"This":[11],"paper":[12],"presents":[13],"a":[14,36,72,85],"heterogeneous":[15],"multi-core":[16],"architecture":[17],"based":[18],"on":[19],"NoC":[20],"to":[21,48,58],"support":[22],"high-speed":[23],"application.":[25],"Four":[26],"general":[27],"processors":[28],"and":[29],"twelve":[30],"ASIPs":[32],"are":[33],"connected":[34],"by":[35],"4\u00d74":[37],"mesh":[38],"NoC.":[39],"A":[40],"modified":[41],"PTLU":[42],"implemented":[44],"each":[46],"ASIP":[47],"accelerate":[49],"AES":[50],"operations.":[51],"Task":[52],"parallelism":[53],"exploited":[57],"obtain":[59],"high":[60],"throughput.":[61],"Synthesized":[62],"SMIC":[64],"0.13\u03bcm":[65],"CMOS":[66],"technology,":[67],"the":[68,82],"proposed":[69],"system":[70,83],"measures":[71],"hardware":[73],"cost":[74],"of":[75,87],"3.08M":[76],"gates.":[77],"Experiment":[78],"results":[79],"show":[80],"that":[81],"achieves":[84],"throughput":[86],"787Mbps":[88],"at":[89],"84MHz.":[90]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}