{"id":"https://openalex.org/W2981405169","doi":"https://doi.org/10.1109/arith.2019.00024","title":"New Technologies for Improved Computing","display_name":"New Technologies for Improved Computing","publication_year":2019,"publication_date":"2019-06-01","ids":{"openalex":"https://openalex.org/W2981405169","doi":"https://doi.org/10.1109/arith.2019.00024","mag":"2981405169"},"language":"en","primary_location":{"id":"doi:10.1109/arith.2019.00024","is_oa":false,"landing_page_url":"https://doi.org/10.1109/arith.2019.00024","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 26th Symposium on Computer Arithmetic (ARITH)","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084237089","display_name":"Marius Cornea","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Marius Cornea","raw_affiliation_strings":["Intel Corporation"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5084237089"],"corresponding_institution_ids":["https://openalex.org/I4210158342"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"96","last_page":"96"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8690000176429749,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8690000176429749,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.7594000101089478,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7289454340934753},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.6202600002288818},{"id":"https://openalex.org/keywords/supercomputer","display_name":"Supercomputer","score":0.5030290484428406},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.48954734206199646},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4747866988182068},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4695366621017456},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4281593859195709},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4086703360080719}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7289454340934753},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.6202600002288818},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.5030290484428406},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48954734206199646},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4747866988182068},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4695366621017456},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4281593859195709},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4086703360080719},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/arith.2019.00024","is_oa":false,"landing_page_url":"https://doi.org/10.1109/arith.2019.00024","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 26th Symposium on Computer Arithmetic (ARITH)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1599154403","https://openalex.org/W122453572","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2351011383","https://openalex.org/W2146879484","https://openalex.org/W4221002079","https://openalex.org/W1757458251","https://openalex.org/W1980898636"],"abstract_inverted_index":{"In":[0],"recent":[1],"years,":[2],"we":[3,90],"learned":[4],"to":[5,92,106,167],"live":[6],"with":[7,17,80,157],"a":[8,133],"slow-down":[9],"in":[10,31,48,66,85,125,132],"the":[11,67,81,97,153],"growth":[12,61,87],"rates":[13],"predicted":[14],"so":[15],"far":[16],"remarkable":[18],"accuracy":[19],"by":[20,128],"Moore's":[21],"law.":[22],"However,":[23],"this":[24],"does":[25],"not":[26,38],"necessarily":[27],"mean":[28],"that":[29,140],"advancements":[30],"performance":[32],"and":[33,46,50,53,65,78,88,143,161,172],"reduced":[34],"power":[35],"consumption":[36],"are":[37],"possible":[39],"anymore.":[40],"There":[41],"will":[42,58,121],"be":[43],"more":[44,103],"innovations":[45],"improvements":[47],"processor":[49,142],"system":[51,144],"architecture":[52],"microarchitecture":[54],"than":[55],"before,":[56],"which":[57,74,120],"enable":[59,122],"continued":[60],"-":[62],"at":[63],"Intel,":[64],"industry.":[68],"Intel":[69,113,149],"has":[70],"identified":[71],"several":[72],"areas":[73],"deserve":[75],"focused":[76],"efforts":[77],"investment,":[79],"promise":[82],"of":[83,141,152],"providing":[84],"return":[86],"results":[89],"came":[91],"expect.":[93],"Manufacturing":[94],"processes":[95],"constitute":[96],"first":[98],"such":[99],"area.":[100],"Besides":[101],"using":[102],"advanced":[104,117],"technologies":[105],"achieve":[107],"smaller":[108],"features":[109],"on":[110],"our":[111,168],"ICs,":[112],"is":[114,139],"also":[115],"introducing":[116],"packaging":[118],"solutions,":[119],"exponential":[123],"scaling":[124],"computing":[126],"density":[127],"extending":[129],"transistor":[130],"placement":[131],"third":[134],"dimension.":[135],"The":[136],"second":[137],"area":[138],"architecture.":[145],"Computing":[146],"architectures":[147],"from":[148],"span":[150],"most":[151],"existing":[154],"compute":[155],"spectrum,":[156],"scalar,":[158],"vector,":[159],"matrix,":[160],"spatial":[162],"architectures.":[163],"These":[164],"map":[165],"roughly":[166],"CPUs,":[169],"GPUs,":[170],"accelerators,":[171],"FPGAs.":[173]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
