{"id":"https://openalex.org/W2111174739","doi":"https://doi.org/10.1109/apccas.2010.5774811","title":"Low IR drop and low power parallel CAM design using gated power transistor technique","display_name":"Low IR drop and low power parallel CAM design using gated power transistor technique","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2111174739","doi":"https://doi.org/10.1109/apccas.2010.5774811","mag":"2111174739"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2010.5774811","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774811","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101615706","display_name":"Anh Tuan","orcid":"https://orcid.org/0000-0002-8320-6818"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Anh Tuan Do","raw_affiliation_strings":["School of EEE, Nanyang Technological University, Singapore","School of EEE Nanyang Technological University, Singapore#TAB#"],"affiliations":[{"raw_affiliation_string":"School of EEE, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of EEE Nanyang Technological University, Singapore#TAB#","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102806139","display_name":"Shoushun Chen","orcid":"https://orcid.org/0000-0002-5451-0028"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Shoushun Chen","raw_affiliation_strings":["School of EEE, Nanyang Technological University, Singapore","School of EEE Nanyang Technological University, Singapore#TAB#"],"affiliations":[{"raw_affiliation_string":"School of EEE, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of EEE Nanyang Technological University, Singapore#TAB#","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112074990","display_name":"Zhi\u2010Hui Kong","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Zhi-Hui Kong","raw_affiliation_strings":["School of EEE, Nanyang Technological University, Singapore","School of EEE Nanyang Technological University, Singapore#TAB#"],"affiliations":[{"raw_affiliation_string":"School of EEE, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of EEE Nanyang Technological University, Singapore#TAB#","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009974389","display_name":"Kiat Seng Yeo","orcid":"https://orcid.org/0000-0002-4524-707X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kiat Seng Yeo","raw_affiliation_strings":["School of EEE, Nanyang Technological University, Singapore","School of EEE Nanyang Technological University, Singapore#TAB#"],"affiliations":[{"raw_affiliation_string":"School of EEE, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"School of EEE Nanyang Technological University, Singapore#TAB#","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5101615706"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":0.4994,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.67755613,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"38","issue":null,"first_page":"708","last_page":"711"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9797999858856201,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10207","display_name":"Advanced biosensing and bioanalysis techniques","score":0.9725000262260437,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.8393311500549316},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.660141110420227},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5838972330093384},{"id":"https://openalex.org/keywords/power-network-design","display_name":"Power network design","score":0.4973583519458771},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4668365716934204},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.46214425563812256},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.43595099449157715},{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.4287378489971161},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4180510938167572},{"id":"https://openalex.org/keywords/voltage-drop","display_name":"Voltage drop","score":0.41708412766456604},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2932671010494232},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1973687708377838},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09160366654396057}],"concepts":[{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.8393311500549316},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.660141110420227},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5838972330093384},{"id":"https://openalex.org/C164565468","wikidata":"https://www.wikidata.org/wiki/Q7236535","display_name":"Power network design","level":3,"score":0.4973583519458771},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4668365716934204},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.46214425563812256},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.43595099449157715},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.4287378489971161},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4180510938167572},{"id":"https://openalex.org/C82178898","wikidata":"https://www.wikidata.org/wiki/Q166839","display_name":"Voltage drop","level":3,"score":0.41708412766456604},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2932671010494232},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1973687708377838},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09160366654396057},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2010.5774811","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774811","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1976849078","https://openalex.org/W2036642572","https://openalex.org/W2062143991","https://openalex.org/W2078732484","https://openalex.org/W2097203998","https://openalex.org/W2147355868","https://openalex.org/W2156563143"],"related_works":["https://openalex.org/W2108172432","https://openalex.org/W2119232911","https://openalex.org/W121910558","https://openalex.org/W4255681223","https://openalex.org/W1987230547","https://openalex.org/W653153512","https://openalex.org/W3215613000","https://openalex.org/W2138550049","https://openalex.org/W2116954639","https://openalex.org/W4245161178"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"analyzed":[4],"the":[5,39,46,50,69,82],"IR":[6,96],"drop":[7,97],"problem":[8],"in":[9,95,101],"large":[10],"scale":[11],"content":[12],"addressable":[13],"memory":[14,40],"(CAM)":[15],"and":[16,42,49,98],"proposed":[17,78],"a":[18,59,64,87,106],"simple":[19],"yet":[20],"efficient":[21],"gated":[22],"power":[23,83],"transistor":[24,84],"technique.":[25],"Each":[26],"row":[27],"of":[28],"CAM":[29,109],"cells":[30],"is":[31,56,77],"powered":[32,57],"by":[33,58],"two":[34],"metal":[35],"rails,":[36],"one":[37,44],"for":[38,45,105],"element":[41],"another":[43],"comparison":[47],"transistors":[48],"match":[51],"lines.":[52],"The":[53],"latter":[54],"rail":[55],"row-based":[60],"transistor,":[61],"which":[62],"presents":[63],"physical":[65],"\u201cgate\u201d":[66],"to":[67,79],"limit":[68],"peak":[70],"current":[71],"during":[72],"comparison.":[73],"Smart":[74],"control":[75],"scheme":[76],"automatically":[80],"turn":[81],"off":[85],"using":[86],"feedback":[88],"delay":[89],"loop.":[90],"Simulation":[91],"reports":[92],"96%":[93],"reduction":[94],"64%":[99],"save":[100],"total":[102],"energy":[103],"consumption,":[104],"conceptual":[107],"8K-word":[108],"macros":[110],"based":[111],"on":[112],"Chartered":[113],"0.13\u03bcm":[114],"CMOS":[115],"technology.":[116]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}