{"id":"https://openalex.org/W2064169027","doi":"https://doi.org/10.1109/4.98975","title":"A 2-ns cycle, 3.8-ns access 512-kb CMOS ECL SRAM with a fully pipelined architecture","display_name":"A 2-ns cycle, 3.8-ns access 512-kb CMOS ECL SRAM with a fully pipelined architecture","publication_year":1991,"publication_date":"1991-01-01","ids":{"openalex":"https://openalex.org/W2064169027","doi":"https://doi.org/10.1109/4.98975","mag":"2064169027"},"language":"en","primary_location":{"id":"doi:10.1109/4.98975","is_oa":false,"landing_page_url":"https://doi.org/10.1109/4.98975","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029639201","display_name":"T.I. Chappell","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"T.I. Chappell","raw_affiliation_strings":["IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012546221","display_name":"B.A. Chappell","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B.A. Chappell","raw_affiliation_strings":["IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007521051","display_name":"S.E. Schuster","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.E. Schuster","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022255184","display_name":"J.W. Allan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.W. Allan","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054992830","display_name":"S. P. Klepner","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.P. Klepner","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"middle","author":{"id":null,"display_name":"R.V. Joshi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R.V. Joshi","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110253692","display_name":"R. Franch","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R.L. Franch","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5029639201"],"corresponding_institution_ids":["https://openalex.org/I4210114115"],"apc_list":null,"apc_paid":null,"fwci":9.4162,"has_fulltext":false,"cited_by_count":122,"citation_normalized_percentile":{"value":0.98539277,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"26","issue":"11","first_page":"1577","last_page":"1585"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7386664748191833},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7286304235458374},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6859050989151001},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6501278281211853},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.5574900507926941},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.43281710147857666},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.39624613523483276},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38230448961257935},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3501574695110321},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32604485750198364},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2285166084766388},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16887006163597107},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0944553017616272}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7386664748191833},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7286304235458374},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6859050989151001},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6501278281211853},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.5574900507926941},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.43281710147857666},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.39624613523483276},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38230448961257935},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3501574695110321},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32604485750198364},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2285166084766388},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16887006163597107},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0944553017616272},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/4.98975","is_oa":false,"landing_page_url":"https://doi.org/10.1109/4.98975","pdf_url":null,"source":{"id":"https://openalex.org/S83637746","display_name":"IEEE Journal of Solid-State Circuits","issn_l":"0018-9200","issn":["0018-9200","1558-173X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Journal of Solid-State Circuits","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1503937186","https://openalex.org/W1511652045","https://openalex.org/W1513737716","https://openalex.org/W1540913159","https://openalex.org/W2040810246","https://openalex.org/W2064198264","https://openalex.org/W2081626929","https://openalex.org/W2091336566","https://openalex.org/W2160587268","https://openalex.org/W2162132506","https://openalex.org/W3144693870"],"related_works":["https://openalex.org/W2119025037","https://openalex.org/W2389637992","https://openalex.org/W1533452797","https://openalex.org/W1982566923","https://openalex.org/W1604874815","https://openalex.org/W2130398249","https://openalex.org/W3123164882","https://openalex.org/W1970220547","https://openalex.org/W2133803033","https://openalex.org/W1523282525"],"abstract_inverted_index":{"The":[0,34,69],"authors":[1],"describe":[2],"a":[3,16,21],"512":[4],"K":[5],"CMOS":[6,35],"static":[7],"RAM":[8],"(SRAM)":[9],"with":[10],"emitter-coupled-logic":[11],"(ECL)":[12],"interfaces":[13],"which":[14,27],"has":[15],"2-ns":[17,63],"cycle":[18,64,98],"time":[19,65,99],"and":[20,37,47,97],"3.8-ns":[22],"access":[23,95],"time,":[24,96],"both":[25],"of":[26,41,51,58,71,85,92],"are":[28,44,67,89,100],"valid":[29],"for":[30],"random":[31],"READ/WRITE":[32],"operations.":[33],"technology":[36],"the":[38,42,48,52,83,86],"physical":[39],"organization":[40],"chip":[43,53,60],"briefly":[45],"discussed,":[46],"pipelined":[49,87],"architecture":[50,88],"is":[54,77],"described.":[55],"Detailed":[56],"measurements":[57],"internal":[59],"waveforms":[61],"demonstrating":[62],"operation":[66],"presented.":[68],"impact":[70],"wire":[72],"RC":[73],"delays":[74],"on":[75],"performance":[76],"discussed.":[78],"Circuit":[79],"examples":[80],"that":[81],"demonstrate":[82],"implementation":[84],"included.":[90],"Measurements":[91],"operating":[93],"margins,":[94],"outlined.<":[101],"<ETX":[102],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[103],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">&gt;</ETX>":[104]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}