{"id":"https://openalex.org/W2963096197","doi":"https://doi.org/10.1109/wodes.2016.7497839","title":"IPA in the loop: Control design for throughput regulation in computer processors","display_name":"IPA in the loop: Control design for throughput regulation in computer processors","publication_year":2016,"publication_date":"2016-05-01","ids":{"openalex":"https://openalex.org/W2963096197","doi":"https://doi.org/10.1109/wodes.2016.7497839","mag":"2963096197"},"language":"en","primary_location":{"id":"doi:10.1109/wodes.2016.7497839","is_oa":false,"landing_page_url":"https://doi.org/10.1109/wodes.2016.7497839","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 13th International Workshop on Discrete Event Systems (WODES)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077106442","display_name":"X. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"X. Chen","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025200449","display_name":"Y. Wardi","orcid":"https://orcid.org/0000-0001-5293-0478"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Y. Wardi","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113186725","display_name":"S. Yalamanchili","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Yalamanchili","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"141","last_page":"146"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.65705806016922},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.6476121544837952},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5229381322860718},{"id":"https://openalex.org/keywords/bridge","display_name":"Bridge (graph theory)","score":0.49466225504875183},{"id":"https://openalex.org/keywords/control-system","display_name":"Control system","score":0.4488735496997833},{"id":"https://openalex.org/keywords/control-engineering","display_name":"Control engineering","score":0.43093952536582947},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.41291457414627075},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2418099045753479},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22016099095344543},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10011154413223267}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.65705806016922},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.6476121544837952},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5229381322860718},{"id":"https://openalex.org/C100776233","wikidata":"https://www.wikidata.org/wiki/Q2532492","display_name":"Bridge (graph theory)","level":2,"score":0.49466225504875183},{"id":"https://openalex.org/C17500928","wikidata":"https://www.wikidata.org/wiki/Q959968","display_name":"Control system","level":2,"score":0.4488735496997833},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.43093952536582947},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.41291457414627075},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2418099045753479},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22016099095344543},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10011154413223267},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C126322002","wikidata":"https://www.wikidata.org/wiki/Q11180","display_name":"Internal medicine","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/wodes.2016.7497839","is_oa":false,"landing_page_url":"https://doi.org/10.1109/wodes.2016.7497839","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 13th International Workshop on Discrete Event Systems (WODES)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W65153156","https://openalex.org/W1531253382","https://openalex.org/W1544439962","https://openalex.org/W1555915743","https://openalex.org/W1587663028","https://openalex.org/W1965052050","https://openalex.org/W1965351873","https://openalex.org/W1981181124","https://openalex.org/W2050481923","https://openalex.org/W2067354926","https://openalex.org/W2090678868","https://openalex.org/W2145021036","https://openalex.org/W2725179571","https://openalex.org/W2963032785","https://openalex.org/W2963096197","https://openalex.org/W4238549726","https://openalex.org/W4297744580"],"related_works":["https://openalex.org/W39373273","https://openalex.org/W2098026815","https://openalex.org/W2390545901","https://openalex.org/W2351709090","https://openalex.org/W24774503","https://openalex.org/W2735012529","https://openalex.org/W2732121450","https://openalex.org/W1619273082","https://openalex.org/W1604566864","https://openalex.org/W4234690636"],"abstract_inverted_index":{"A":[0],"new":[1],"technique":[2,74],"for":[3],"performance":[4,98],"regulation":[5,62],"in":[6,24,63,122],"event-driven":[7],"systems,":[8],"recently":[9],"proposed":[10,72],"by":[11,28,49,78],"the":[12,25,33,36,41,68,71,112,115,124],"authors,":[13],"consists":[14],"of":[15,32,35,70,82,111,126],"an":[16,128],"adaptive-gain":[17],"integral":[18],"control.":[19],"The":[20,54,80,108],"gain":[21],"is":[22,46,85,121],"adjusted":[23],"control":[26,42,73],"loop":[27],"a":[29,134,139],"real-time":[30],"estimation":[31,45],"derivative":[34],"plant-function":[37],"with":[38],"respect":[39],"to":[40,60,86,99,114,133],"input.":[43],"This":[44],"carried":[47],"out":[48],"Infinitesimal":[50],"Perturbation":[51],"Analysis":[52],"(IPA).":[53],"main":[55],"motivation":[56],"comes":[57],"from":[58,102],"applications":[59],"throughput":[61],"computer":[64],"processors,":[65],"where":[66],"to-date,":[67],"testing":[69],"has":[75],"been":[76],"assessed":[77],"simulation.":[79],"purpose":[81],"this":[83],"paper":[84,113],"report":[87],"on":[88,91,117],"its":[89,97],"implementation":[90],"Intel's":[92],"Haswell":[93],"microprocessor,":[94],"and":[95,131,143],"compare":[96],"that":[100],"obtained":[101],"cycle-level,":[103],"full":[104],"system":[105],"simulation":[106,132],"environment.":[107],"intrinsic":[109],"contribution":[110],"Workshop":[116],"Discrete":[118],"Event":[119],"Systems":[120],"describing":[123],"process":[125],"taking":[127],"IPA-based":[129],"design":[130],"concrete":[135],"implementation,":[136],"thereby":[137],"providing":[138],"bridge":[140],"between":[141],"theory":[142],"applications.":[144]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
