{"id":"https://openalex.org/W4399119823","doi":"https://doi.org/10.1109/vts60656.2024.10538823","title":"Sequential Decoders for Binary Linear Block ECCs","display_name":"Sequential Decoders for Binary Linear Block ECCs","publication_year":2024,"publication_date":"2024-04-22","ids":{"openalex":"https://openalex.org/W4399119823","doi":"https://doi.org/10.1109/vts60656.2024.10538823"},"language":"en","primary_location":{"id":"doi:10.1109/vts60656.2024.10538823","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/vts60656.2024.10538823","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 42nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070545363","display_name":"Valentin Gherman","orcid":"https://orcid.org/0009-0008-8322-9906"},"institutions":[{"id":"https://openalex.org/I3020098449","display_name":"CEA Grenoble","ror":"https://ror.org/02mg6n827","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I3020098449"]},{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Valentin Gherman","raw_affiliation_strings":["Universit&#x00E9; Grenoble Alpes,CEA, List,Grenoble,France,F-38000"],"affiliations":[{"raw_affiliation_string":"Universit&#x00E9; Grenoble Alpes,CEA, List,Grenoble,France,F-38000","institution_ids":["https://openalex.org/I3020098449","https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5092142446","display_name":"Cyrille Laffond","orcid":null},"institutions":[{"id":"https://openalex.org/I3020098449","display_name":"CEA Grenoble","ror":"https://ror.org/02mg6n827","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I3020098449"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Cyrille Laffond","raw_affiliation_strings":["Universit&#x00E9; Grenoble Alpes,CEA, List,Grenoble,France,F-38000"],"affiliations":[{"raw_affiliation_string":"Universit&#x00E9; Grenoble Alpes,CEA, List,Grenoble,France,F-38000","institution_ids":["https://openalex.org/I3020098449","https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5070545363"],"corresponding_institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I3020098449","https://openalex.org/I4210085861"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05289397,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7437978386878967},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.7126733064651489},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5502609014511108},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.513261079788208},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.5038499236106873},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4845772981643677},{"id":"https://openalex.org/keywords/observability","display_name":"Observability","score":0.47933229804039},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.46143245697021484},{"id":"https://openalex.org/keywords/bch-code","display_name":"BCH code","score":0.4562550485134125},{"id":"https://openalex.org/keywords/sequential-decoding","display_name":"Sequential decoding","score":0.4488081932067871},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4426889717578888},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.43271058797836304},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.41908204555511475},{"id":"https://openalex.org/keywords/controllability","display_name":"Controllability","score":0.41619569063186646},{"id":"https://openalex.org/keywords/list-decoding","display_name":"List decoding","score":0.41211652755737305},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3644958734512329},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.34608665108680725},{"id":"https://openalex.org/keywords/block-code","display_name":"Block code","score":0.24593156576156616},{"id":"https://openalex.org/keywords/concatenated-error-correction-code","display_name":"Concatenated error correction code","score":0.1799314022064209},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.16274535655975342}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7437978386878967},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.7126733064651489},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5502609014511108},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.513261079788208},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.5038499236106873},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4845772981643677},{"id":"https://openalex.org/C36299963","wikidata":"https://www.wikidata.org/wiki/Q1369844","display_name":"Observability","level":2,"score":0.47933229804039},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.46143245697021484},{"id":"https://openalex.org/C42276685","wikidata":"https://www.wikidata.org/wiki/Q795705","display_name":"BCH code","level":3,"score":0.4562550485134125},{"id":"https://openalex.org/C193969084","wikidata":"https://www.wikidata.org/wiki/Q7452500","display_name":"Sequential decoding","level":4,"score":0.4488081932067871},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4426889717578888},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.43271058797836304},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.41908204555511475},{"id":"https://openalex.org/C48209547","wikidata":"https://www.wikidata.org/wiki/Q1331104","display_name":"Controllability","level":2,"score":0.41619569063186646},{"id":"https://openalex.org/C204397858","wikidata":"https://www.wikidata.org/wiki/Q4437907","display_name":"List decoding","level":5,"score":0.41211652755737305},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3644958734512329},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.34608665108680725},{"id":"https://openalex.org/C157125643","wikidata":"https://www.wikidata.org/wiki/Q884707","display_name":"Block code","level":3,"score":0.24593156576156616},{"id":"https://openalex.org/C78944582","wikidata":"https://www.wikidata.org/wiki/Q5158264","display_name":"Concatenated error correction code","level":4,"score":0.1799314022064209},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.16274535655975342},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C28826006","wikidata":"https://www.wikidata.org/wiki/Q33521","display_name":"Applied mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts60656.2024.10538823","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/vts60656.2024.10538823","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 42nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W336411274","https://openalex.org/W1606480398","https://openalex.org/W1980073965","https://openalex.org/W2014536047","https://openalex.org/W2021708499","https://openalex.org/W2023359429","https://openalex.org/W2025474944","https://openalex.org/W2036887642","https://openalex.org/W2038491968","https://openalex.org/W2083774980","https://openalex.org/W2104688220","https://openalex.org/W2105761964","https://openalex.org/W2115553608","https://openalex.org/W2144253890","https://openalex.org/W2162456729","https://openalex.org/W2164904402","https://openalex.org/W2489439822","https://openalex.org/W2625708623","https://openalex.org/W3178812393","https://openalex.org/W4246578358","https://openalex.org/W4380302681","https://openalex.org/W6889749592"],"related_works":["https://openalex.org/W1974357939","https://openalex.org/W3144457048","https://openalex.org/W2052237030","https://openalex.org/W1599365967","https://openalex.org/W4205451769","https://openalex.org/W1995527419","https://openalex.org/W4391272432","https://openalex.org/W4244153028","https://openalex.org/W2521769401","https://openalex.org/W2148484519"],"abstract_inverted_index":{"This":[0,82],"paper":[1],"proposes":[2],"a":[3,35,57,77,85],"simple":[4],"sequential":[5],"decoder":[6,89],"architecture":[7],"for":[8],"relatively":[9],"strong":[10],"ECCs":[11],"with":[12,56,91],"the":[13,17,67,88,104,114],"goal":[14],"to":[15,33,45,75,121,128,138],"reduce":[16],"complexity":[18],"and":[19,26,108,131],"latency":[20,90,130],"of":[21,37,69,87,106,116],"error":[22],"correction":[23],"in":[24,66,73],"memory":[25],"storage":[27],"systems.":[28],"Given":[29],"an":[30],"ECC":[31],"able":[32],"correct":[34],"maximum":[36],"t":[38,70],"erroneous":[39,47,71],"bits":[40,48,72],"per":[41],"code":[42],"word,":[43],"up":[44,127],"$t-1$":[46],"are":[49,63],"handled":[50],"within":[51],"one":[52],"decoding":[53,93],"cycle":[54,95],"as":[55,136],"single-cycle":[58,139],"fully-combinational":[59,140],"decoder.":[60],"Additional":[61],"cycles":[62],"introduced":[64],"only":[65],"presence":[68],"order":[74],"implement":[76],"so":[78],"called":[79],"step-by-step":[80],"decoding.":[81],"may":[83],"facilitate":[84],"reduction":[86],"negligible":[92],"(clock)":[94],"overhead.":[96],"Further":[97],"logic":[98,133],"optimization":[99],"is":[100],"achieved":[101],"based":[102],"on":[103],"exploitation":[105],"observability":[107],"controllability":[109],"don\u2019t":[110],"cares":[111],"resulted":[112],"from":[113],"utilization":[115],"oversized":[117],"syndromes.":[118],"The":[119],"application":[120],"triple-error-correcting":[122],"BCH":[123],"codes":[124],"$(t=3)$":[125],"enabled":[126],"22%":[129],"45%":[132],"area":[134],"reductions":[135],"compared":[137],"decoders.":[141]},"counts_by_year":[],"updated_date":"2025-12-26T23:08:49.675405","created_date":"2025-10-10T00:00:00"}
