{"id":"https://openalex.org/W4399119907","doi":"https://doi.org/10.1109/vts60656.2024.10538514","title":"Reliability analysis and mitigation for analog computation-in-memory: from technology to application","display_name":"Reliability analysis and mitigation for analog computation-in-memory: from technology to application","publication_year":2024,"publication_date":"2024-04-22","ids":{"openalex":"https://openalex.org/W4399119907","doi":"https://doi.org/10.1109/vts60656.2024.10538514"},"language":"en","primary_location":{"id":"doi:10.1109/vts60656.2024.10538514","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/vts60656.2024.10538514","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 42nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045634195","display_name":"Mahta Mayahinia","orcid":"https://orcid.org/0000-0002-6084-9810"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Mahta Mayahinia","raw_affiliation_strings":["Karlsruhe Institute of Technology (KIT),Department of Computer Science,Karlsruhe,Germany","Department of Computer Science, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany"],"affiliations":[{"raw_affiliation_string":"Karlsruhe Institute of Technology (KIT),Department of Computer Science,Karlsruhe,Germany","institution_ids":["https://openalex.org/I102335020"]},{"raw_affiliation_string":"Department of Computer Science, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5098922922","display_name":"Haneen G. Hezayyin","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Haneen G. Hezayyin","raw_affiliation_strings":["Karlsruhe Institute of Technology (KIT),Department of Computer Science,Karlsruhe,Germany","Department of Computer Science, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany"],"affiliations":[{"raw_affiliation_string":"Karlsruhe Institute of Technology (KIT),Department of Computer Science,Karlsruhe,Germany","institution_ids":["https://openalex.org/I102335020"]},{"raw_affiliation_string":"Department of Computer Science, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087885735","display_name":"Mehdi Tahoori","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mehdi Tahoori","raw_affiliation_strings":["Karlsruhe Institute of Technology (KIT),Department of Computer Science,Karlsruhe,Germany","Department of Computer Science, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany"],"affiliations":[{"raw_affiliation_string":"Karlsruhe Institute of Technology (KIT),Department of Computer Science,Karlsruhe,Germany","institution_ids":["https://openalex.org/I102335020"]},{"raw_affiliation_string":"Department of Computer Science, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5045634195"],"corresponding_institution_ids":["https://openalex.org/I102335020"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05291331,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.7027046084403992},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6748715043067932},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6620959043502808},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.6615960597991943},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.6541315317153931},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.6125839948654175},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.4952754080295563},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.412793904542923},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3999512493610382},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3892028033733368},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36027097702026367},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.2811576724052429},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2123449146747589},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.20414814352989197},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19911521673202515},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18283382058143616},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08239653706550598}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.7027046084403992},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6748715043067932},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6620959043502808},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.6615960597991943},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.6541315317153931},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.6125839948654175},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4952754080295563},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.412793904542923},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3999512493610382},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3892028033733368},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36027097702026367},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.2811576724052429},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2123449146747589},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.20414814352989197},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19911521673202515},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18283382058143616},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08239653706550598},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts60656.2024.10538514","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/vts60656.2024.10538514","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 42nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Climate action","id":"https://metadata.un.org/sdg/13","score":0.44999998807907104}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W755906292","https://openalex.org/W2738894409","https://openalex.org/W2775637085","https://openalex.org/W2868611809","https://openalex.org/W3007317489","https://openalex.org/W3009643182","https://openalex.org/W3082899001","https://openalex.org/W3084023049","https://openalex.org/W3092585568","https://openalex.org/W3104353813","https://openalex.org/W3111367661","https://openalex.org/W3175897766","https://openalex.org/W3199673394","https://openalex.org/W3216758435","https://openalex.org/W4249144718","https://openalex.org/W4280508307","https://openalex.org/W4282976225","https://openalex.org/W4313170690","https://openalex.org/W4313496520","https://openalex.org/W4319068960","https://openalex.org/W4367692603"],"related_works":["https://openalex.org/W3005999147","https://openalex.org/W3176428941","https://openalex.org/W3089883684","https://openalex.org/W4232634182","https://openalex.org/W4301187613","https://openalex.org/W2923038022","https://openalex.org/W3008646524","https://openalex.org/W4385624997","https://openalex.org/W2593506445","https://openalex.org/W2076211355"],"abstract_inverted_index":{"The":[0,121],"computation-in-memory":[1],"(CiM)":[2],"paradigm":[3],"is":[4,37],"widely":[5],"acknowledged":[6],"to":[7,40,77,136],"tackle":[8],"the":[9,21,25,32,35,41,47,51,55,59,72,75,78,87,96,100,117,125,138],"memory":[10,17],"wall":[11],"problem.":[12],"Additionally,":[13],"leveraging":[14],"non-volatile":[15],"resistive":[16],"(NVM)":[18],"technologies":[19],"enhances":[20],"energy":[22],"efficiency":[23],"of":[24,34,58,128,141],"CiM":[26,79,129],"by":[27,103],"enabling":[28],"analog":[29,56],"computation.":[30,60],"However,":[31],"reliability":[33,67,140],"NVM-CiM":[36],"challenged":[38],"due":[39],"inherent":[42],"device":[43,89],"and":[44,54,69,91,93,107,131],"circuit":[45,101],"imperfections,":[46],"technology-level":[48],"process":[49],"variation,":[50],"sensing":[52,108],"offset,":[53],"nature":[57],"In":[61],"this":[62,82],"paper,":[63],"we":[64,84,111],"perform":[65],"comprehensive":[66],"analysis":[68],"mitigation":[70,134],"from":[71],"technology":[73],"all":[74],"way":[76],"application.":[80],"For":[81],"aim,":[83],"accurately":[85],"model":[86,95],"NVM":[88],"variability":[90],"imperfection":[92],"effectively":[94],"consequent":[97],"errors":[98],"at":[99],"level":[102],"considering":[104],"crossbar":[105],"parasitic":[106],"offset.":[109],"Subsequently,":[110],"inject":[112],"these":[113],"modeled":[114],"faults":[115],"into":[116],"CiM-enabled":[118],"full-system":[119],"architecture.":[120],"study":[122],"quantitatively":[123],"assesses":[124],"masking":[126],"capability":[127],"applications":[130],"explores":[132],"potential":[133],"techniques":[135],"enhance":[137],"overall":[139],"NVM-CiM.":[142]},"counts_by_year":[],"updated_date":"2025-12-26T23:08:49.675405","created_date":"2025-10-10T00:00:00"}