{"id":"https://openalex.org/W3170943383","doi":"https://doi.org/10.1109/vts50974.2021.9441057","title":"Special Session - Test for AI Chips: from DFT to On-line Testing","display_name":"Special Session - Test for AI Chips: from DFT to On-line Testing","publication_year":2021,"publication_date":"2021-04-25","ids":{"openalex":"https://openalex.org/W3170943383","doi":"https://doi.org/10.1109/vts50974.2021.9441057","mag":"3170943383"},"language":"en","primary_location":{"id":"doi:10.1109/vts50974.2021.9441057","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts50974.2021.9441057","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 39th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100768288","display_name":"Huawei Li","orcid":"https://orcid.org/0000-0001-8082-4218"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Huawei Li","raw_affiliation_strings":["SKLCA, Institute of Computing Technology, Chinese Academy of Sciences, China"],"affiliations":[{"raw_affiliation_string":"SKLCA, Institute of Computing Technology, Chinese Academy of Sciences, China","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023380073","display_name":"Xiaowei Li","orcid":"https://orcid.org/0000-0002-0874-814X"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaowei Li","raw_affiliation_strings":["SKLCA, Institute of Computing Technology, Chinese Academy of Sciences, China"],"affiliations":[{"raw_affiliation_string":"SKLCA, Institute of Computing Technology, Chinese Academy of Sciences, China","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052025786","display_name":"Yu Huang","orcid":"https://orcid.org/0000-0002-3927-1102"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yu Huang","raw_affiliation_strings":["HiSilicon, China"],"affiliations":[{"raw_affiliation_string":"HiSilicon, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100346965","display_name":"Ying Wang","orcid":"https://orcid.org/0000-0001-5172-4736"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ying Wang","raw_affiliation_strings":["HiSilicon, China"],"affiliations":[{"raw_affiliation_string":"HiSilicon, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082250675","display_name":"Gary Guo","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Gary Guo","raw_affiliation_strings":["Enflame Technology, China"],"affiliations":[{"raw_affiliation_string":"Enflame Technology, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100768288"],"corresponding_institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210090176"],"apc_list":null,"apc_paid":null,"fwci":0.4606,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.57668034,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10876","display_name":"Fault Detection and Control Systems","score":0.9933000206947327,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/session","display_name":"Session (web analytics)","score":0.7547792196273804},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.7458865642547607},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6963145732879639},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.569066047668457},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.5425679087638855},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5289086103439331},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5189428329467773},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.4722665548324585},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4698411822319031},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4371769428253174},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.43168431520462036},{"id":"https://openalex.org/keywords/automatic-test-equipment","display_name":"Automatic test equipment","score":0.42565280199050903},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.4236093759536743},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.367353618144989},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.24751025438308716},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2062595784664154},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.19406989216804504},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17447808384895325},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.10997283458709717}],"concepts":[{"id":"https://openalex.org/C2779182362","wikidata":"https://www.wikidata.org/wiki/Q17126187","display_name":"Session (web analytics)","level":2,"score":0.7547792196273804},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.7458865642547607},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6963145732879639},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.569066047668457},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.5425679087638855},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5289086103439331},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5189428329467773},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.4722665548324585},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4698411822319031},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4371769428253174},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.43168431520462036},{"id":"https://openalex.org/C141842801","wikidata":"https://www.wikidata.org/wiki/Q363815","display_name":"Automatic test equipment","level":3,"score":0.42565280199050903},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.4236093759536743},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.367353618144989},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.24751025438308716},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2062595784664154},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.19406989216804504},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17447808384895325},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.10997283458709717},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts50974.2021.9441057","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts50974.2021.9441057","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 39th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6399999856948853,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2157212570","https://openalex.org/W2543176856","https://openalex.org/W3088373974","https://openalex.org/W1897203488","https://openalex.org/W2616892825","https://openalex.org/W2624668974","https://openalex.org/W2168820524","https://openalex.org/W1837475237","https://openalex.org/W2140497172","https://openalex.org/W2806771822"],"abstract_inverted_index":{"This":[0],"special":[1],"session":[2],"focuses":[3],"on":[4,77],"test":[5,17,35,80],"for":[6,16,40,58,68],"artificial":[7],"intelligence":[8],"(AI)":[9],"chips,":[10,73],"with":[11,43,74],"important":[12],"issues":[13],"from":[14],"design":[15],"(DFT)":[18],"to":[19],"on-line":[20,51],"testing.":[21],"The":[22,46,62],"first":[23],"talk":[24,48,64],"discusses":[25,49],"different":[26],"DFT":[27],"implementations":[28],"and":[29,37,54],"their":[30],"tradeoffs":[31],"as":[32,34],"well":[33],"access":[36],"configuration":[38],"infrastructure":[39],"AI":[41,71],"chips":[42],"many":[44],"cores.":[45],"second":[47],"low-cost":[50],"fault":[52],"detection":[53],"hardware":[55],"salvaging":[56],"techniques":[57],"neural":[59],"network":[60],"processors.":[61],"last":[63],"gives":[65],"case":[66],"studies":[67],"testing":[69],"industrial":[70],"SOC":[72],"an":[75],"emphasis":[76],"the":[78],"automatic":[79],"pattern":[81],"generation":[82],"(ATPG)":[83],"methodology.":[84]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
