{"id":"https://openalex.org/W3033667356","doi":"https://doi.org/10.1109/vts48691.2020.9107606","title":"Selective Checksum based On-line Error Correction for RRAM based Matrix Operations","display_name":"Selective Checksum based On-line Error Correction for RRAM based Matrix Operations","publication_year":2020,"publication_date":"2020-04-01","ids":{"openalex":"https://openalex.org/W3033667356","doi":"https://doi.org/10.1109/vts48691.2020.9107606","mag":"3033667356"},"language":"en","primary_location":{"id":"doi:10.1109/vts48691.2020.9107606","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts48691.2020.9107606","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 38th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006172745","display_name":"Abhishek Das","orcid":"https://orcid.org/0000-0002-2362-0195"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Abhishek Das","raw_affiliation_strings":["Computer Engineering Research Center, University of Texas at Austin, TX"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Engineering Research Center, University of Texas at Austin, TX","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012356472","display_name":"Nur A. Touba","orcid":"https://orcid.org/0000-0001-5083-6701"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nur A. Touba","raw_affiliation_strings":["Computer Engineering Research Center, University of Texas at Austin, TX"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Engineering Research Center, University of Texas at Austin, TX","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":0.6244,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.67688564,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/checksum","display_name":"Checksum","score":0.9358402490615845},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7861888408660889},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.5867339968681335},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5460096597671509},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.5122324824333191},{"id":"https://openalex.org/keywords/matrix-multiplication","display_name":"Matrix multiplication","score":0.48045915365219116},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.447609543800354},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4213992953300476},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3781953454017639},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.377097487449646},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3640093505382538},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.09955811500549316}],"concepts":[{"id":"https://openalex.org/C162372511","wikidata":"https://www.wikidata.org/wiki/Q218341","display_name":"Checksum","level":2,"score":0.9358402490615845},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7861888408660889},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.5867339968681335},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5460096597671509},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.5122324824333191},{"id":"https://openalex.org/C17349429","wikidata":"https://www.wikidata.org/wiki/Q1049914","display_name":"Matrix multiplication","level":3,"score":0.48045915365219116},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.447609543800354},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4213992953300476},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3781953454017639},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.377097487449646},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3640093505382538},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.09955811500549316},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C84114770","wikidata":"https://www.wikidata.org/wiki/Q46344","display_name":"Quantum","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts48691.2020.9107606","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts48691.2020.9107606","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 38th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16","score":0.8199999928474426}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1971319818","https://openalex.org/W1985800138","https://openalex.org/W2038721103","https://openalex.org/W2056312243","https://openalex.org/W2134732546","https://openalex.org/W2163605009","https://openalex.org/W2400475751","https://openalex.org/W2583536366","https://openalex.org/W2616386420","https://openalex.org/W2626719825","https://openalex.org/W2767260595","https://openalex.org/W2802367674","https://openalex.org/W2891632206","https://openalex.org/W2902880618","https://openalex.org/W2911496292","https://openalex.org/W2958035450","https://openalex.org/W6684191040"],"related_works":["https://openalex.org/W2377071794","https://openalex.org/W2107209346","https://openalex.org/W12639752","https://openalex.org/W2080298133","https://openalex.org/W2128245068","https://openalex.org/W2905469256","https://openalex.org/W787782896","https://openalex.org/W2113867106","https://openalex.org/W2000606687","https://openalex.org/W2022912972"],"abstract_inverted_index":{"Resistive":[0],"RAM":[1],"technology":[2],"with":[3,38],"it\u2019s":[4],"in":[5,83,116,144,156,218,225],"memory":[6,51,182,214],"computation":[7,168],"and":[8,31,63,137,176,184,188,211,215],"matrix":[9,35],"vector":[10,36],"multiplication":[11,37],"capabilities":[12],"has":[13],"paved":[14],"the":[15,28,39,44,103,117,145,194,203,234],"way":[16],"for":[17,98,192],"efficient":[18],"hardware":[19],"implementations":[20],"of":[21,50,81,92,105,154,160],"neural":[22],"networks.":[23],"The":[24,147,181],"ability":[25],"to":[26,59,67,95,120,220,232,237],"store":[27],"training":[29],"weights":[30],"perform":[32],"a":[33,48,126,157,161,172,177,226,230],"direct":[34],"applied":[40],"inputs":[41],"thus":[42],"producing":[43],"outputs":[45],"directly":[46],"reduces":[47],"lot":[49],"transfer":[52],"overhead.":[53],"But":[54],"such":[55],"schemes":[56,169,196],"are":[57,80,108,170,197],"prone":[58],"various":[60],"soft":[61,106],"errors":[62,65,79,107,143,155,224,240],"hard":[64],"due":[66],"immature":[68],"fabrication":[69],"processes":[70],"creating":[71],"marginal":[72],"cells,":[73],"read":[74],"disturbance":[75],"errors,":[76],"etc.":[77],"Soft":[78],"concern":[82],"this":[84,124],"case":[85],"since":[86],"they":[87,112],"can":[88,113,141,150,206],"potentially":[89,114],"cause":[90],"mi-classification":[91],"objects":[93],"leading":[94,119],"catastrophic":[96],"consequences":[97],"safety":[99],"critical":[100],"applications.":[101],"Since":[102],"location":[104],"not":[109],"known":[110],"previously,":[111],"manifest":[115],"field":[118],"data":[121],"corruption.":[122],"In":[123],"paper,":[125],"new":[127],"on-line":[128],"error":[129],"correcting":[130],"scheme":[131,149,175,231,236],"is":[132,200,241],"proposed":[133,148,195,204,235],"based":[134],"on":[135],"partial":[136],"selective":[138],"checksums":[139],"which":[140],"correct":[142,151],"field.":[146],"any":[152],"number":[153],"single":[158,227],"column":[159,239],"given":[162],"RRAM":[163],"matrix.":[164],"Two":[165],"different":[166],"checksum":[167],"proposed,":[171],"majority":[173],"voting-based":[174],"Hamming":[178],"code-based":[179],"scheme.":[180],"overhead":[183,217],"decoding":[185,209],"area,":[186],"latency":[187,210],"dynamic":[189],"power":[190],"consumption":[191],"both":[193],"presented.":[198],"It":[199],"seen":[201],"that":[202],"solutions":[205],"achieve":[207],"low":[208],"comparatively":[212],"smaller":[213],"area":[216],"order":[219],"guarantee":[221],"protection":[222],"against":[223],"column.":[228],"Lastly,":[229],"extend":[233],"multiple":[238],"also":[242],"discussed.":[243]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
