{"id":"https://openalex.org/W3034145270","doi":"https://doi.org/10.1109/vts48691.2020.9107572","title":"A dynamic reconfiguration mechanism to increase the reliability of GPGPUs","display_name":"A dynamic reconfiguration mechanism to increase the reliability of GPGPUs","publication_year":2020,"publication_date":"2020-04-01","ids":{"openalex":"https://openalex.org/W3034145270","doi":"https://doi.org/10.1109/vts48691.2020.9107572","mag":"3034145270"},"language":"en","primary_location":{"id":"doi:10.1109/vts48691.2020.9107572","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts48691.2020.9107572","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 38th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://zenodo.org/record/4545616","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5107558399","display_name":"Josie E. Rodriguez Condia","orcid":"https://orcid.org/0000-0001-5957-5624"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Josie E. Rodriguez Condia","raw_affiliation_strings":["Politecnico di Torino,Torino,Italy","Politecnico di Torino, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Torino,Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048295823","display_name":"Pierpaolo Narducci","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Pierpaolo Narducci","raw_affiliation_strings":["Politecnico di Torino,Torino,Italy","Politecnico di Torino, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Torino,Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058555274","display_name":"M. Sonza Reorda","orcid":"https://orcid.org/0000-0003-2899-7669"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Sonza Reorda","raw_affiliation_strings":["Politecnico di Torino,Torino,Italy","Politecnico di Torino, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Torino,Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021426042","display_name":"Luca Sterpone","orcid":"https://orcid.org/0000-0002-3080-2560"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"L. Sterpone","raw_affiliation_strings":["Politecnico di Torino,Torino,Italy","Politecnico di Torino, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Torino,Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5107558399"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":1.4053,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.80232888,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.856932520866394},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8252116441726685},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5803239345550537},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5526911020278931},{"id":"https://openalex.org/keywords/spare-part","display_name":"Spare part","score":0.531277060508728},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.5217624306678772},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5037969946861267},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.45277220010757446},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.35616016387939453},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34850138425827026},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2053968906402588}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.856932520866394},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8252116441726685},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5803239345550537},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5526911020278931},{"id":"https://openalex.org/C194648553","wikidata":"https://www.wikidata.org/wiki/Q1364774","display_name":"Spare part","level":2,"score":0.531277060508728},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5217624306678772},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5037969946861267},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.45277220010757446},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.35616016387939453},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34850138425827026},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2053968906402588},{"id":"https://openalex.org/C162853370","wikidata":"https://www.wikidata.org/wiki/Q39809","display_name":"Marketing","level":1,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/vts48691.2020.9107572","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts48691.2020.9107572","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE 38th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},{"id":"pmh:oai:zenodo.org:4545616","is_oa":true,"landing_page_url":"https://zenodo.org/record/4545616","pdf_url":null,"source":{"id":"https://openalex.org/S4306400562","display_name":"Zenodo (CERN European Organization for Nuclear Research)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I67311998","host_organization_name":"European Organization for Nuclear Research","host_organization_lineage":["https://openalex.org/I67311998"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferencePaper"}],"best_oa_location":{"id":"pmh:oai:zenodo.org:4545616","is_oa":true,"landing_page_url":"https://zenodo.org/record/4545616","pdf_url":null,"source":{"id":"https://openalex.org/S4306400562","display_name":"Zenodo (CERN European Organization for Nuclear Research)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I67311998","host_organization_name":"European Organization for Nuclear Research","host_organization_lineage":["https://openalex.org/I67311998"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferencePaper"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W1971695022","https://openalex.org/W1977722048","https://openalex.org/W1987163471","https://openalex.org/W1999799697","https://openalex.org/W2021676867","https://openalex.org/W2040542258","https://openalex.org/W2057882245","https://openalex.org/W2093962471","https://openalex.org/W2114930002","https://openalex.org/W2119482888","https://openalex.org/W2125614145","https://openalex.org/W2139375423","https://openalex.org/W2167357818","https://openalex.org/W2178768573","https://openalex.org/W2185226291","https://openalex.org/W2321359359","https://openalex.org/W2398801417","https://openalex.org/W2415589344","https://openalex.org/W2538867637","https://openalex.org/W2727422107","https://openalex.org/W2735211100","https://openalex.org/W2741634092","https://openalex.org/W2896334750","https://openalex.org/W2943316405","https://openalex.org/W2947770260","https://openalex.org/W2951728061","https://openalex.org/W2978306198","https://openalex.org/W4248228503","https://openalex.org/W4251213825","https://openalex.org/W6677639902","https://openalex.org/W6677993950","https://openalex.org/W6685858816","https://openalex.org/W6686257517"],"related_works":["https://openalex.org/W2130594209","https://openalex.org/W1950809481","https://openalex.org/W2101219550","https://openalex.org/W2085988155","https://openalex.org/W1885164404","https://openalex.org/W1862835629","https://openalex.org/W1569711686","https://openalex.org/W2136799148","https://openalex.org/W2897533804","https://openalex.org/W2204754129"],"abstract_inverted_index":{"General":[0],"Purpose":[1],"Graphic":[2],"Processing":[3],"Units":[4],"(GPGPUs)":[5],"are":[6,31,39],"effective":[7],"solutions":[8,54],"for":[9,74],"high-demanding":[10],"data":[11],"processing":[12],"applications.":[13],"Recently,":[14],"they":[15,70],"started":[16],"to":[17,42,62,115],"be":[18,113],"used":[19,114],"even":[20,174],"in":[21,59,96,102,130,140,155,175],"safety-critical":[22],"applications,":[23],"such":[24],"as":[25],"autonomous":[26],"car":[27],"driving":[28],"systems.":[29],"GPGPUs":[30],"implemented":[32],"using":[33],"the":[34,46,63,68,91,97,132,135,141,156,163,176,183],"latest":[35],"semiconductor":[36],"technologies,":[37],"which":[38],"more":[40],"prone":[41],"faults":[43,95,181],"arising":[44],"during":[45],"lifetime":[47],"operation.":[48],"However,":[49],"until":[50],"now":[51],"fault":[52,121],"mitigation":[53],"were":[55,71],"not":[56,151],"extensively":[57],"included":[58],"GPGPUs,":[60],"due":[61],"limited":[64],"reliability":[65],"requirements":[66],"of":[67,93,134,137,178],"applications":[69],"originally":[72],"intended":[73],"(e.g.,":[75],"gaming":[76],"or":[77],"multimedia).":[78],"This":[79],"work":[80],"proposes":[81],"a":[82,120,166],"dynamically":[83,128],"configurable":[84],"self-":[85],"repairing":[86],"mechanism":[87,105],"aimed":[88],"at":[89],"mitigating":[90],"impact":[92],"permanent":[94,180],"Scalar":[98],"Processor":[99],"(SP)":[100],"cores":[101],"GPGPUs.":[103],"The":[104,143],"is":[106,122,145],"based":[107],"on":[108],"spare":[109],"modules":[110],"that":[111,162],"can":[112],"replace":[116],"faulty":[117],"SPs":[118,139],"when":[119],"detected.":[123],"A":[124],"configuration":[125],"instruction":[126],"allows":[127],"controlling":[129],"software":[131],"selection":[133],"set":[136],"active":[138],"SM.":[142],"method":[144],"extremely":[146],"flexible":[147],"since":[148],"it":[149],"does":[150],"require":[152],"any":[153,179],"change":[154],"application":[157],"software.":[158],"Experimental":[159],"results":[160],"show":[161],"solution":[164],"introduces":[165],"moderate":[167],"area":[168],"overhead":[169],"while":[170],"allowing":[171],"continue":[172],"working":[173],"case":[177],"affecting":[182],"SPs.":[184]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}