{"id":"https://openalex.org/W2959945462","doi":"https://doi.org/10.1109/vts.2019.8758652","title":"Cache Design for Yield-per-Area Maximization: Switchable Spare Columns with Disabling (SSC-Disable)","display_name":"Cache Design for Yield-per-Area Maximization: Switchable Spare Columns with Disabling (SSC-Disable)","publication_year":2019,"publication_date":"2019-04-01","ids":{"openalex":"https://openalex.org/W2959945462","doi":"https://doi.org/10.1109/vts.2019.8758652","mag":"2959945462"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2019.8758652","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2019.8758652","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 37th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083528897","display_name":"Soowang Park","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Soowang Park","raw_affiliation_strings":["Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, CA"],"affiliations":[{"raw_affiliation_string":"Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, CA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100601790","display_name":"Sandeep K. Gupta","orcid":"https://orcid.org/0000-0002-2585-9378"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sandeep K. Gupta","raw_affiliation_strings":["Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, CA"],"affiliations":[{"raw_affiliation_string":"Ming Hsieh Department of Electrical Engineering, University of Southern California, Los Angeles, CA","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5083528897"],"corresponding_institution_ids":["https://openalex.org/I1174212"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05790105,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"14","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spare-part","display_name":"Spare part","score":0.8429949879646301},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.73148512840271},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.662100613117218},{"id":"https://openalex.org/keywords/row","display_name":"Row","score":0.6334609389305115},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5546843409538269},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5010147094726562},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4953438341617584},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.49021536111831665},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4656696319580078},{"id":"https://openalex.org/keywords/yield","display_name":"Yield (engineering)","score":0.4247715175151825},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.41967999935150146},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3422981798648834},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14386048913002014},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09962666034698486},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.06970095634460449}],"concepts":[{"id":"https://openalex.org/C194648553","wikidata":"https://www.wikidata.org/wiki/Q1364774","display_name":"Spare part","level":2,"score":0.8429949879646301},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.73148512840271},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.662100613117218},{"id":"https://openalex.org/C135598885","wikidata":"https://www.wikidata.org/wiki/Q1366302","display_name":"Row","level":2,"score":0.6334609389305115},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5546843409538269},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5010147094726562},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4953438341617584},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.49021536111831665},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4656696319580078},{"id":"https://openalex.org/C134121241","wikidata":"https://www.wikidata.org/wiki/Q899301","display_name":"Yield (engineering)","level":2,"score":0.4247715175151825},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.41967999935150146},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3422981798648834},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14386048913002014},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09962666034698486},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06970095634460449},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C191897082","wikidata":"https://www.wikidata.org/wiki/Q11467","display_name":"Metallurgy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2019.8758652","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2019.8758652","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 37th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1518236483","https://openalex.org/W2056641105","https://openalex.org/W2067168777","https://openalex.org/W2070235663","https://openalex.org/W2073217565","https://openalex.org/W2096568519","https://openalex.org/W2109824347","https://openalex.org/W2127315516","https://openalex.org/W2129335451","https://openalex.org/W2157587823","https://openalex.org/W2161648335","https://openalex.org/W2169087039","https://openalex.org/W2171372273","https://openalex.org/W2171922263","https://openalex.org/W2213088056","https://openalex.org/W2569048993","https://openalex.org/W4205474030","https://openalex.org/W4238002809","https://openalex.org/W6679486773","https://openalex.org/W6683923090","https://openalex.org/W6684586602"],"related_works":["https://openalex.org/W2376859990","https://openalex.org/W2912704652","https://openalex.org/W2381161177","https://openalex.org/W2319226115","https://openalex.org/W830772239","https://openalex.org/W2970750595","https://openalex.org/W2366601680","https://openalex.org/W2096502566","https://openalex.org/W2433052208","https://openalex.org/W2081416538"],"abstract_inverted_index":{"Modern":[0],"SRAMs":[1],"have":[2],"high":[3,20,33,52,65,113],"failure":[4,21,53],"rates":[5],"due":[6],"to":[7,74,93,104,173,207],"defects":[8],"and":[9,29,126,193],"variations,":[10],"especially":[11],"during":[12],"low-voltage":[13],"operation":[14],"in":[15,77,79,82,144,147],"low":[16,88],"power":[17,194],"modes.":[18],"At":[19],"rates,":[22,54],"a":[23,36,87,100,137,171],"direct":[24],"application":[25],"of":[26,59],"spare":[27,138],"rows":[28,149],"columns":[30],"approaches":[31],"incurs":[32],"overheads.":[34,152,195],"Since":[35,109],"recent":[37],"paper":[38],"[1]":[39],"says":[40],"that":[41,198],"error":[42],"correcting":[43],"codes":[44],"(ECCs)":[45],"are":[46],"the":[47,57,72,94,199],"only":[48],"cost-effective":[49],"approach":[50,102,130,202],"under":[51,188],"we":[55,91,115,157],"analyzed":[56],"strengths":[58],"ECC.":[60],"This":[61,183],"showed":[62],"that,":[63],"at":[64,150],"overheads,":[66,114,156],"ECC":[67,121],"provides":[68],"one":[69],"key":[70],"advantage:":[71],"ability":[73],"correct":[75],"failures":[76],"cells":[78,143],"different":[80,83,145,148],"locations":[81,146],"rows.":[84],"To":[85,153],"find":[86,174],"overhead":[89],"solution,":[90],"turn":[92],"Divided":[95],"Wordline/Bitline":[96],"(DWL+DBL)":[97],"[2]":[98],"approach,":[99],"spares-based":[101],"designed":[103],"provide":[105],"exactly":[106],"this":[107],"capability.":[108],"DWL+DBL":[110,125],"also":[111],"has":[112],"develop":[116,170],"our":[117,128],"ideas":[118],"for":[119],"simplifying":[120],"as":[122,124],"well":[123],"derive":[127],"new":[129],"called":[131],"Switchable":[132],"Spare":[133],"Columns":[134],"(SSC),":[135],"where":[136],"column":[139],"can":[140],"replace":[141],"failing":[142],"lower":[151],"further":[154],"reduce":[155],"propose":[158],"SSC-Disable,":[159],"which":[160],"combines":[161],"SSC":[162,180],"with":[163,179],"cache":[164,177],"block":[165],"disabling":[166],"[3].":[167],"We":[168,196],"then":[169],"method":[172,184],"globally":[175],"efficient":[176],"designs":[178],"or":[181],"SSC-Disable.":[182],"maximizes":[185],"yield-per-area":[186],"(YPA)":[187],"user-specified":[189],"constraints":[190],"on":[191],"delay":[192],"show":[197],"proposed":[200],"SSC-Disable":[201],"significantly":[203],"improves":[204],"yield":[205],"compared":[206],"state-of-the-art":[208],"ECC-based":[209],"approaches.":[210]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
