{"id":"https://openalex.org/W2957098781","doi":"https://doi.org/10.1109/vts.2019.8758645","title":"ZeroScreen: A Novel Structure for IC Reliability Screening at Time-Zero","display_name":"ZeroScreen: A Novel Structure for IC Reliability Screening at Time-Zero","publication_year":2019,"publication_date":"2019-04-01","ids":{"openalex":"https://openalex.org/W2957098781","doi":"https://doi.org/10.1109/vts.2019.8758645","mag":"2957098781"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2019.8758645","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2019.8758645","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 37th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086121202","display_name":"Liting Yu","orcid":"https://orcid.org/0000-0002-0861-1223"},"institutions":[{"id":"https://openalex.org/I82880672","display_name":"Beihang University","ror":"https://ror.org/00wk2mp56","country_code":"CN","type":"education","lineage":["https://openalex.org/I82880672"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Liting Yu","raw_affiliation_strings":["School of Electronic and Information Engineering, Beihang University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic and Information Engineering, Beihang University, Beijing, China","institution_ids":["https://openalex.org/I82880672"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101654149","display_name":"Xiaoxiao Wang","orcid":"https://orcid.org/0000-0001-7943-8360"},"institutions":[{"id":"https://openalex.org/I82880672","display_name":"Beihang University","ror":"https://ror.org/00wk2mp56","country_code":"CN","type":"education","lineage":["https://openalex.org/I82880672"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoxiao Wang","raw_affiliation_strings":["School of Electronic and Information Engineering, Beihang University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic and Information Engineering, Beihang University, Beijing, China","institution_ids":["https://openalex.org/I82880672"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5086121202"],"corresponding_institution_ids":["https://openalex.org/I82880672"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05549374,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"64","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7596482038497925},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.6497576832771301},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5458371043205261},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.489448219537735},{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.48759689927101135},{"id":"https://openalex.org/keywords/circuit-reliability","display_name":"Circuit reliability","score":0.46087008714675903},{"id":"https://openalex.org/keywords/hot-carrier-injection","display_name":"Hot-carrier injection","score":0.45100417733192444},{"id":"https://openalex.org/keywords/failure-rate","display_name":"Failure rate","score":0.4385031759738922},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.43222111463546753},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36563539505004883},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35263776779174805},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25162938237190247},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.18215090036392212},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1702868938446045},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14359134435653687},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.11569640040397644}],"concepts":[{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7596482038497925},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.6497576832771301},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5458371043205261},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.489448219537735},{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.48759689927101135},{"id":"https://openalex.org/C2778309119","wikidata":"https://www.wikidata.org/wiki/Q5121614","display_name":"Circuit reliability","level":4,"score":0.46087008714675903},{"id":"https://openalex.org/C73500089","wikidata":"https://www.wikidata.org/wiki/Q2445876","display_name":"Hot-carrier injection","level":4,"score":0.45100417733192444},{"id":"https://openalex.org/C163164238","wikidata":"https://www.wikidata.org/wiki/Q2737027","display_name":"Failure rate","level":2,"score":0.4385031759738922},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.43222111463546753},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36563539505004883},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35263776779174805},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25162938237190247},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.18215090036392212},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1702868938446045},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14359134435653687},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.11569640040397644},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2019.8758645","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2019.8758645","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 37th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1519877492","https://openalex.org/W1522193198","https://openalex.org/W1958753241","https://openalex.org/W1983465425","https://openalex.org/W1987212007","https://openalex.org/W1999919743","https://openalex.org/W2012543617","https://openalex.org/W2012844187","https://openalex.org/W2020295113","https://openalex.org/W2029364567","https://openalex.org/W2031517912","https://openalex.org/W2043496087","https://openalex.org/W2047344934","https://openalex.org/W2053889244","https://openalex.org/W2059193309","https://openalex.org/W2072983737","https://openalex.org/W2100661413","https://openalex.org/W2102729267","https://openalex.org/W2111642414","https://openalex.org/W2113488650","https://openalex.org/W2113728962","https://openalex.org/W2118477157","https://openalex.org/W2127877371","https://openalex.org/W2129181227","https://openalex.org/W2150056343","https://openalex.org/W2166022257","https://openalex.org/W2253078265","https://openalex.org/W2544050254","https://openalex.org/W2585078402","https://openalex.org/W2622455411","https://openalex.org/W2767031374","https://openalex.org/W4229927883","https://openalex.org/W4235449297","https://openalex.org/W4239499928"],"related_works":["https://openalex.org/W1970920853","https://openalex.org/W2099679924","https://openalex.org/W2738622559","https://openalex.org/W2184065029","https://openalex.org/W1977755957","https://openalex.org/W2120314645","https://openalex.org/W4393217857","https://openalex.org/W2043496087","https://openalex.org/W2803645833","https://openalex.org/W2328978473"],"abstract_inverted_index":{"With":[0],"technology":[1],"approaching":[2],"to":[3,68,73,91,122],"14nm":[4],"and":[5,23,36,131,181,185],"below,":[6],"the":[7,19,42,49,65,69,76,79,142,166,171],"shrinking":[8],"gate":[9],"size":[10],"makes":[11],"IC":[12],"reliability":[13,80,94,159,172],"become":[14],"a":[15,104],"big":[16],"concern.":[17],"As":[18],"speed":[20],"of":[21,53,175],"CMOS":[22],"FinFET":[24],"is":[25,89,115,120],"degraded":[26],"by":[27,161],"aging":[28,50,112],"mechanisms":[29],"including":[30],"negative":[31],"bias":[32],"temperature":[33],"instability":[34],"(NBTI)":[35],"hot":[37],"carrier":[38],"injection":[39],"(HCI).":[40],"At":[41],"same":[43,70],"time,":[44],"significant":[45,59],"process":[46],"variations":[47],"differ":[48],"degradation":[51],"rate":[52],"each":[54],"individual":[55],"IC,":[56],"which":[57],"cause":[58],"failure":[60],"time":[61,119],"differences":[62],"even":[63],"for":[64,82,108,183],"ICs":[66],"belonging":[67],"lot.":[71],"Therefore,":[72],"efficiently":[74],"bin":[75],"devices":[77,147],"into":[78,156],"tiers":[81],"different":[83],"safety":[84],"&":[85],"security":[86],"usages,":[87],"it":[88],"necessary":[90],"perform":[92],"predictive":[93,111,158],"screening":[95,113,118,173],"during":[96],"production":[97],"test":[98,128,135,149],"at":[99],"time-zero.":[100],"In":[101,141],"this":[102],"paper,":[103],"novel":[105],"on-chip":[106],"architecture":[107],"fast":[109],"time-zero":[110],"(ZeroScreen)":[114],"proposed.":[116],"The":[117],"limited":[121],"8.14ms":[123],"per":[124],"device":[125],"considering":[126],"50MHz":[127],"clock":[129],"frequency":[130],"6.6":[132],"\u03bcs":[133],"automatic":[134],"equipment":[136],"(ATE)":[137],"level":[138],"settling":[139],"time.":[140],"experiment,":[143],"185":[144],"fresh":[145],"FPGA":[146],"under":[148],"(DUTs)":[150],"implemented":[151],"with":[152,165],"ZeroScreen":[153,176],"are":[154,177],"binned":[155],"4":[157],"bins":[160],"ZeroScreen.":[162],"By":[163],"comparing":[164],"8-hour":[167],"accelerated":[168],"burn-in":[169],"results,":[170],"errors":[174],"less":[178],"than":[179],"6.5%":[180],"4.3%":[182],"static":[184],"dynamic":[186],"stress":[187],"cases,":[188],"respectively.":[189]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
