{"id":"https://openalex.org/W2960266816","doi":"https://doi.org/10.1109/vts.2019.8758603","title":"Silicon Proven Timing Signoff Methodology using Hazard-Free Robust Path Delay Tests","display_name":"Silicon Proven Timing Signoff Methodology using Hazard-Free Robust Path Delay Tests","publication_year":2019,"publication_date":"2019-04-01","ids":{"openalex":"https://openalex.org/W2960266816","doi":"https://doi.org/10.1109/vts.2019.8758603","mag":"2960266816"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2019.8758603","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2019.8758603","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 37th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102892513","display_name":"Ankit Shah","orcid":"https://orcid.org/0000-0002-7839-9213"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Ankit Shah","raw_affiliation_strings":["Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079703994","display_name":"Raman Nayyar","orcid":"https://orcid.org/0000-0002-0458-9751"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Raman Nayyar","raw_affiliation_strings":["Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101770488","display_name":"Arani Sinha","orcid":"https://orcid.org/0000-0003-2069-3177"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Arani Sinha","raw_affiliation_strings":["Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5102892513"],"corresponding_institution_ids":["https://openalex.org/I4210158342"],"apc_list":null,"apc_paid":null,"fwci":0.2408,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.47925907,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.6546004414558411},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.619718074798584},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5646778345108032},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.555756151676178},{"id":"https://openalex.org/keywords/hazard","display_name":"Hazard","score":0.5205541849136353},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.5112957954406738},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.44919514656066895},{"id":"https://openalex.org/keywords/guard","display_name":"Guard (computer science)","score":0.4369143843650818},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.41630807518959045},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3766403794288635},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24982810020446777},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.19096863269805908},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18693125247955322}],"concepts":[{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.6546004414558411},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.619718074798584},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5646778345108032},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.555756151676178},{"id":"https://openalex.org/C49261128","wikidata":"https://www.wikidata.org/wiki/Q1132455","display_name":"Hazard","level":2,"score":0.5205541849136353},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.5112957954406738},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.44919514656066895},{"id":"https://openalex.org/C141141315","wikidata":"https://www.wikidata.org/wiki/Q2379942","display_name":"Guard (computer science)","level":2,"score":0.4369143843650818},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.41630807518959045},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3766403794288635},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24982810020446777},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.19096863269805908},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18693125247955322},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2019.8758603","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2019.8758603","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 37th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.47999998927116394}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1583304273","https://openalex.org/W1997205036","https://openalex.org/W2008396243","https://openalex.org/W2029945169","https://openalex.org/W2071340128","https://openalex.org/W2118934558","https://openalex.org/W2156839985","https://openalex.org/W2158137510","https://openalex.org/W4243669191","https://openalex.org/W6657817052"],"related_works":["https://openalex.org/W2100329931","https://openalex.org/W2145535176","https://openalex.org/W2158805860","https://openalex.org/W4229446324","https://openalex.org/W2144812464","https://openalex.org/W1570180536","https://openalex.org/W4246774934","https://openalex.org/W2117925677","https://openalex.org/W3140640533","https://openalex.org/W2110367374"],"abstract_inverted_index":{"We":[0,27,86],"describe":[1],"a":[2,31,60],"novel":[3],"methodology":[4,64],"to":[5],"validate":[6],"path":[7,24,95],"level":[8],"static":[9],"timing":[10,35],"analysis":[11],"(STA)":[12],"on":[13,37,50],"silicon":[14,38],"by":[15],"leveraging":[16],"standard":[17],"scan":[18],"architecture":[19],"and":[20],"using":[21,92,102],"hazard-free":[22,93],"robust":[23,94],"delay":[25],"tests.":[26],"have":[28,57,87],"successfully":[29],"validated":[30],"sizable":[32],"set":[33],"of":[34,100],"paths":[36],"across":[39],"multiple":[40],"advanced":[41],"process":[42,69,77],"nodes.":[43],"Learnings":[44],"from":[45],"these":[46],"STA":[47,62],"correlation":[48],"exercises":[49],"representative":[51],"ASIC":[52],"blocks":[53],"in":[54,59],"test":[55],"chips":[56],"resulted":[58],"silicon-proven":[61],"signoff":[63],"with":[65],"optimum":[66],"guard-bands.":[67],"The":[68],"health":[70],"feedback":[71],"has":[72],"proved":[73],"valuable":[74],"for":[75],"the":[76,82],"development":[78,84],"team":[79],"especially":[80],"during":[81],"early":[83],"phase.":[85],"observed":[88],"that":[89,101],"Fmax":[90],"determined":[91],"tests":[96],"is":[97],"within":[98],"\u00b15%":[99],"functional":[103],"benchmark.":[104]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}