{"id":"https://openalex.org/W2805459376","doi":"https://doi.org/10.1109/vts.2018.8368665","title":"Multi-faceted microarchitecture level reliability characterization for NVIDIA and AMD GPUs","display_name":"Multi-faceted microarchitecture level reliability characterization for NVIDIA and AMD GPUs","publication_year":2018,"publication_date":"2018-04-01","ids":{"openalex":"https://openalex.org/W2805459376","doi":"https://doi.org/10.1109/vts.2018.8368665","mag":"2805459376"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2018.8368665","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2018.8368665","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 36th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011079176","display_name":"Alessandro Vallero","orcid":"https://orcid.org/0000-0001-5058-9608"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Alessandro Vallero","raw_affiliation_strings":["Politecnico di Torino"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050643198","display_name":"Sotiris Tselonis","orcid":null},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Sotiris Tselonis","raw_affiliation_strings":["University of Athens"],"affiliations":[{"raw_affiliation_string":"University of Athens","institution_ids":["https://openalex.org/I200777214"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007119083","display_name":"Dimitris Gizopoulos","orcid":"https://orcid.org/0000-0002-1613-9061"},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitris Gizopoulos","raw_affiliation_strings":["National and Kapodistrian University of Athens, Athinon, GR"],"affiliations":[{"raw_affiliation_string":"National and Kapodistrian University of Athens, Athinon, GR","institution_ids":["https://openalex.org/I200777214"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026593274","display_name":"Stefano Di Carlo","orcid":"https://orcid.org/0000-0002-7512-5356"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Stefano Di Carlo","raw_affiliation_strings":["Politecnico di Torino"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5011079176"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":1.03,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.77807275,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8277837038040161},{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.7846200466156006},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.6858859658241272},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.61399245262146},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5497744679450989},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.5436228513717651},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.410871684551239},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3491150140762329},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3322716951370239},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16312441229820251}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8277837038040161},{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.7846200466156006},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.6858859658241272},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.61399245262146},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5497744679450989},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.5436228513717651},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.410871684551239},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3491150140762329},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3322716951370239},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16312441229820251},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2018.8368665","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2018.8368665","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 36th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1963880259","https://openalex.org/W1979527452","https://openalex.org/W2025940962","https://openalex.org/W2027716782","https://openalex.org/W2031533321","https://openalex.org/W2052887509","https://openalex.org/W2080592089","https://openalex.org/W2103742924","https://openalex.org/W2134309495","https://openalex.org/W2138815251","https://openalex.org/W2144512449","https://openalex.org/W2146351362","https://openalex.org/W2411279070","https://openalex.org/W2615815445","https://openalex.org/W2735001018","https://openalex.org/W2735162286","https://openalex.org/W2752470767","https://openalex.org/W2760030941","https://openalex.org/W4232837724","https://openalex.org/W4249144718","https://openalex.org/W6681538391","https://openalex.org/W6737860804"],"related_works":["https://openalex.org/W1963859303","https://openalex.org/W2364044215","https://openalex.org/W2389600408","https://openalex.org/W240129890","https://openalex.org/W3048701459","https://openalex.org/W2149078538","https://openalex.org/W2080146221","https://openalex.org/W2546223573","https://openalex.org/W2370314112","https://openalex.org/W1912958759"],"abstract_inverted_index":{"State-of-the-art":[0],"GPU":[1,49,61,86,137,152],"chips":[2,138],"are":[3],"designed":[4],"to":[5,51,53],"deliver":[6],"extreme":[7],"throughput":[8],"for":[9,14,24,34,73,125,132],"graphics":[10],"as":[11,13,144,146],"well":[12,145],"data-parallel":[15],"general":[16],"purpose":[17],"computing":[18,23,27],"workloads":[19,50],"(GPGPU":[20],"computing).":[21],"Unlike":[22],"graphics,":[25],"GPGPU":[26,43],"requires":[28,45],"highly":[29],"reliable":[30],"operations.":[31],"Since":[32],"provisioning":[33],"high":[35],"reliability":[36,78,99,128],"may":[37],"affect":[38],"performance,":[39],"the":[40,46,58,74,77,82,116,133,150],"design":[41],"of":[42,48,60,76,84,139],"systems":[44],"vulnerability":[47],"soft-errors":[52],"be":[54],"jointly":[55],"evaluated":[56],"with":[57,81],"performance":[59,83,126],"chips.":[62],"We":[63,97],"present":[64],"an":[65],"extended":[66],"study":[67],"based":[68,110],"on":[69,111,149],"a":[70],"consolidated":[71],"workflow":[72],"evaluation":[75],"in":[79],"correlation":[80],"four":[85],"architectures":[87],"and":[88,94,102,108,118,127,142],"corresponding":[89],"chips:":[90],"AMD":[91],"Southern":[92],"Islands":[93],"NVIDIA":[95],"G80/GT200/Fermi.":[96],"obtained":[98],"measurements":[100],"(AVF":[101],"FIT)":[103],"employing":[104],"both":[105],"fault":[106],"injection":[107],"ACE-analysis":[109],"microarchitecture-level":[112],"simulators.":[113],"Apart":[114],"from":[115],"reliability-only":[117],"performance-only":[119],"measurements,":[120],"we":[121],"propose":[122],"combined":[123],"metrics":[124],"that":[129],"assist":[130],"comparisons":[131],"same":[134,151],"application":[135],"among":[136,147],"different":[140],"ISAs":[141],"vendors,":[143],"benchmarks":[148],"chip.":[153]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
