{"id":"https://openalex.org/W2807174038","doi":"https://doi.org/10.1109/vts.2018.8368635","title":"An inter-layer interconnect BIST solution for monolithic 3D ICs","display_name":"An inter-layer interconnect BIST solution for monolithic 3D ICs","publication_year":2018,"publication_date":"2018-04-01","ids":{"openalex":"https://openalex.org/W2807174038","doi":"https://doi.org/10.1109/vts.2018.8368635","mag":"2807174038"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2018.8368635","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2018.8368635","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 36th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049240930","display_name":"Abhishek Koneru","orcid":"https://orcid.org/0000-0002-3808-7303"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Abhishek Koneru","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033880864","display_name":"Krishnendu Chakrabarty","orcid":"https://orcid.org/0000-0003-4475-6435"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Krishnendu Chakrabarty","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5049240930"],"corresponding_institution_ids":["https://openalex.org/I170897317"],"apc_list":null,"apc_paid":null,"fwci":0.6438,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.70442082,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12224","display_name":"Nanofabrication and Lithography Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bipartite-graph","display_name":"Bipartite graph","score":0.7380520701408386},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.7024607062339783},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6913262009620667},{"id":"https://openalex.org/keywords/hamiltonian-path","display_name":"Hamiltonian path","score":0.5797052979469299},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.563342273235321},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.5094040036201477},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5036439299583435},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.4803541898727417},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.42757248878479004},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3718135356903076},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.34319576621055603},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3009756803512573},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.2920985221862793},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.2777150869369507},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21211296319961548},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.17331594228744507},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14633366465568542},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12584319710731506},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12468987703323364}],"concepts":[{"id":"https://openalex.org/C197657726","wikidata":"https://www.wikidata.org/wiki/Q174733","display_name":"Bipartite graph","level":3,"score":0.7380520701408386},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.7024607062339783},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6913262009620667},{"id":"https://openalex.org/C86524685","wikidata":"https://www.wikidata.org/wiki/Q273037","display_name":"Hamiltonian path","level":3,"score":0.5797052979469299},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.563342273235321},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.5094040036201477},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5036439299583435},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.4803541898727417},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.42757248878479004},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3718135356903076},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.34319576621055603},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3009756803512573},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.2920985221862793},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.2777150869369507},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21211296319961548},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.17331594228744507},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14633366465568542},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12584319710731506},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12468987703323364},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2018.8368635","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2018.8368635","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 36th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.47999998927116394,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1545025609","https://openalex.org/W1560950418","https://openalex.org/W1965336266","https://openalex.org/W1965451131","https://openalex.org/W2013397418","https://openalex.org/W2031887472","https://openalex.org/W2045647383","https://openalex.org/W2108880814","https://openalex.org/W2117226423","https://openalex.org/W2132155220","https://openalex.org/W2137654743","https://openalex.org/W2137906067","https://openalex.org/W2140069842","https://openalex.org/W2141461755","https://openalex.org/W2153705063","https://openalex.org/W2157629140","https://openalex.org/W2215131791","https://openalex.org/W2245094412","https://openalex.org/W2296529627","https://openalex.org/W2494513800","https://openalex.org/W2505380261","https://openalex.org/W2581008992","https://openalex.org/W2735555835","https://openalex.org/W2770372249","https://openalex.org/W6632738794","https://openalex.org/W6676056936","https://openalex.org/W6677426919"],"related_works":["https://openalex.org/W4323268213","https://openalex.org/W4242128654","https://openalex.org/W2152549830","https://openalex.org/W1993744883","https://openalex.org/W2962785705","https://openalex.org/W2016868849","https://openalex.org/W4400469587","https://openalex.org/W2150113875","https://openalex.org/W2904708802","https://openalex.org/W4224241520"],"abstract_inverted_index":{"Monolithic":[0],"three-dimensional":[1],"(M3D)":[2],"integration":[3,6,10],"offers":[4],"higher-density":[5],"compared":[7],"to":[8,21,33,94,98],"3D":[9],"based":[11],"on":[12],"through-silicon":[13],"vias.":[14],"Advances":[15],"in":[16,24,38,106],"testing":[17],"are":[18,52],"however":[19],"needed":[20],"screen":[22],"defects":[23],"M3D":[25],"integration.":[26],"We":[27,82],"propose":[28,120],"a":[29,55,73,80,102,107,121],"built-in":[30],"self-test":[31],"solution":[32,134],"target":[34],"shorts":[35],"and":[36,63,69,72,79,139],"opens":[37,138],"ILVs.":[39,64],"In":[40],"the":[41,47,84,88,91,96,112,131],"proposed":[42,132],"solution,":[43],"scan":[44],"cells":[45,67],"at":[46],"interface":[48],"of":[49,77,86,90,100],"two":[50],"layers":[51],"stitched":[53],"into":[54],"twisted-ring":[56],"counter":[57],"(TRC)":[58],"using":[59],"their":[60],"functional":[61],"outputs":[62],"The":[65],"interface-register":[66],"launch":[68],"capture":[70],"tests,":[71],"test":[74,133],"path":[75],"consists":[76],"ILVs":[78],"multiplexer.":[81],"map":[83],"problem":[85,116],"minimizing":[87],"length":[89],"wires":[92],"added":[93],"stitch":[95],"TRC":[97],"that":[99,130],"finding":[101],"minimum-cost":[103],"Hamiltonian":[104,114],"circuit":[105,115],"weighted":[108,113],"bipartite":[109],"graph.":[110],"Since":[111],"is":[117],"NP-Complete,":[118],"we":[119],"heuristic":[122],"algorithm":[123],"for":[124],"this":[125],"problem.":[126],"Simulation":[127],"results":[128],"show":[129],"can":[135],"detect":[136],"all":[137],"shorts.":[140]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2019,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
