{"id":"https://openalex.org/W2401126153","doi":"https://doi.org/10.1109/vts.2016.7477310","title":"Test method and scheme for low-power validation in modern SOC integrated circuits","display_name":"Test method and scheme for low-power validation in modern SOC integrated circuits","publication_year":2016,"publication_date":"2016-04-01","ids":{"openalex":"https://openalex.org/W2401126153","doi":"https://doi.org/10.1109/vts.2016.7477310","mag":"2401126153"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2016.7477310","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2016.7477310","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 34th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085906985","display_name":"Bonita Bhaskaran","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Bonita Bhaskaran","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060188846","display_name":"Amit Sanghani","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amit Sanghani","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038085485","display_name":"Kaushik Narayanun","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kaushik Narayanun","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021581865","display_name":"Ayub Abdollahian","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ayub Abdollahian","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088029036","display_name":"Amit Laknaur","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amit Laknaur","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I4210127875"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5085906985"],"corresponding_institution_ids":["https://openalex.org/I4210127875"],"apc_list":null,"apc_paid":null,"fwci":1.2613,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.77807034,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage-droop","display_name":"Voltage droop","score":0.729995608329773},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.6500310897827148},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6325222253799438},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5907801389694214},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5399399399757385},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5237550735473633},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.5146383047103882},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.49093225598335266},{"id":"https://openalex.org/keywords/power-optimization","display_name":"Power optimization","score":0.42410218715667725},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.42214539647102356},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3924371004104614},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.22191005945205688},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21063339710235596},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.195978045463562},{"id":"https://openalex.org/keywords/voltage-regulator","display_name":"Voltage regulator","score":0.12698781490325928},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.10115036368370056}],"concepts":[{"id":"https://openalex.org/C40760162","wikidata":"https://www.wikidata.org/wiki/Q10920295","display_name":"Voltage droop","level":4,"score":0.729995608329773},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.6500310897827148},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6325222253799438},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5907801389694214},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5399399399757385},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5237550735473633},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.5146383047103882},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.49093225598335266},{"id":"https://openalex.org/C168292644","wikidata":"https://www.wikidata.org/wiki/Q10860336","display_name":"Power optimization","level":4,"score":0.42410218715667725},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.42214539647102356},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3924371004104614},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.22191005945205688},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21063339710235596},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.195978045463562},{"id":"https://openalex.org/C110706871","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Voltage regulator","level":3,"score":0.12698781490325928},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.10115036368370056},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2016.7477310","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2016.7477310","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 34th VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8700000047683716,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1788608581","https://openalex.org/W1987474301","https://openalex.org/W1988813737","https://openalex.org/W2000093478","https://openalex.org/W2003272148","https://openalex.org/W2024774649","https://openalex.org/W2080600740","https://openalex.org/W2093305845","https://openalex.org/W2133162007","https://openalex.org/W2134236236","https://openalex.org/W2136961720","https://openalex.org/W2141568925","https://openalex.org/W2153171864","https://openalex.org/W2154781197","https://openalex.org/W6682599810"],"related_works":["https://openalex.org/W2129194943","https://openalex.org/W1988813737","https://openalex.org/W2028499810","https://openalex.org/W2142217172","https://openalex.org/W2289725165","https://openalex.org/W2116799183","https://openalex.org/W2150927200","https://openalex.org/W4255979915","https://openalex.org/W1579620770","https://openalex.org/W2153653002"],"abstract_inverted_index":{"Test":[0],"Mode":[1],"power":[2,9,14,31,49,73,78],"can":[3],"be":[4],"5X":[5],"higher":[6],"than":[7],"functional":[8,21],"in":[10],"GPUs,":[11],"while":[12],"the":[13,30,46,86,107,122],"grid":[15],"is":[16,37],"designed":[17],"only":[18],"for":[19,51,106,121],"worst-case":[20],"toggle.":[22],"The":[23],"large":[24],"simultaneous":[25],"switching":[26],"noise":[27],"induced":[28],"on":[29,95,126],"rails":[32],"during":[33],"at-speed":[34],"capture":[35],"testing":[36],"constrained":[38],"by":[39],"means":[40],"of":[41],"hardware":[42],"solution.":[43],"To":[44],"determine":[45,63],"best":[47],"low":[48],"mode":[50,79],"ATPG,":[52],"we":[53],"propose":[54],"novel":[55],"techniques":[56],"to:":[57],"estimate":[58],"global":[59],"peak":[60],"current":[61],"(di),":[62],"local":[64],"droop":[65],"trend":[66],"and":[67,69,91,98,101,115],"validate":[68],"further":[70],"optimize":[71],"chosen":[72],"settings":[74],"with":[75],"exhaustive":[76],"post-silicon":[77],"tuning.":[80],"During":[81],"Power":[82,116],"Optimization":[83],"(PO)":[84],"phase,":[85],"measured":[87],"clock":[88],"frequency":[89],"(fclk)":[90],"Vdroop":[92],"are":[93,104],"analyzed":[94],"every":[96],"pattern":[97,102,109,124],"test":[99],"coverage":[100],"count":[103],"optimized":[105],"production":[108,123],"set.":[110],"We":[111],"share":[112],"correlation":[113],"results":[114],"Supply":[117],"Noise":[118],"(PSN)":[119],"distribution":[120],"set":[125],"recent":[127],"28-nm":[128],"GPUs.":[129]},"counts_by_year":[{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
