{"id":"https://openalex.org/W1569415299","doi":"https://doi.org/10.1109/vts.2015.7116268","title":"Testing of 3D-stacked ICs with hard- and soft-dies - a Particle Swarm Optimization based approach","display_name":"Testing of 3D-stacked ICs with hard- and soft-dies - a Particle Swarm Optimization based approach","publication_year":2015,"publication_date":"2015-04-01","ids":{"openalex":"https://openalex.org/W1569415299","doi":"https://doi.org/10.1109/vts.2015.7116268","mag":"1569415299"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2015.7116268","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2015.7116268","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 33rd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030502691","display_name":"Rajit Karmakar","orcid":"https://orcid.org/0000-0001-7346-4955"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Rajit Karmakar","raw_affiliation_strings":["Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, India, 721302"],"affiliations":[{"raw_affiliation_string":"Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, India, 721302","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040847195","display_name":"Aditya Agarwal","orcid":null},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Aditya Agarwal","raw_affiliation_strings":["Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, India, 721302"],"affiliations":[{"raw_affiliation_string":"Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, India, 721302","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077947010","display_name":"Santanu Chattopadhyay","orcid":"https://orcid.org/0000-0002-1227-0732"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Santanu Chattopadhyay","raw_affiliation_strings":["Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, India, 721302"],"affiliations":[{"raw_affiliation_string":"Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Dept. of Electronics & Electrical Comm. Engineering, Indian Institute of Technology Kharagpur, India, 721302","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5030502691"],"corresponding_institution_ids":["https://openalex.org/I145894827"],"apc_list":null,"apc_paid":null,"fwci":0.3946,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.65200259,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/particle-swarm-optimization","display_name":"Particle swarm optimization","score":0.7921813130378723},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5891755819320679},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.572888195514679},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.47528043389320374},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.44859611988067627},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3535979986190796},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.33304888010025024},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3328065872192383},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3327159583568573},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2632800042629242},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11892843246459961},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08337831497192383}],"concepts":[{"id":"https://openalex.org/C85617194","wikidata":"https://www.wikidata.org/wiki/Q2072794","display_name":"Particle swarm optimization","level":2,"score":0.7921813130378723},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5891755819320679},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.572888195514679},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.47528043389320374},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.44859611988067627},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3535979986190796},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.33304888010025024},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3328065872192383},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3327159583568573},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2632800042629242},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11892843246459961},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08337831497192383},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2015.7116268","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2015.7116268","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 33rd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1538968037","https://openalex.org/W1837496673","https://openalex.org/W2007361309","https://openalex.org/W2016460235","https://openalex.org/W2033330932","https://openalex.org/W2090396476","https://openalex.org/W2110075134","https://openalex.org/W2121926956","https://openalex.org/W2125982897","https://openalex.org/W2152195021","https://openalex.org/W2158277795","https://openalex.org/W4230995773"],"related_works":["https://openalex.org/W2380576232","https://openalex.org/W2937054111","https://openalex.org/W2066223521","https://openalex.org/W2013178899","https://openalex.org/W373327546","https://openalex.org/W2321534397","https://openalex.org/W2058958858","https://openalex.org/W2077601556","https://openalex.org/W2148243540","https://openalex.org/W1835805572"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,99],"test":[4,8,18,29,37,51,88,105,117],"architecture":[5],"optimization":[6,97],"and":[7,27,62,84],"scheduling":[9,19],"strategy":[10],"for":[11],"TSV":[12,63],"based":[13,69],"3D-Stacked":[14],"ICs":[15],"(SICs).":[16],"A":[17],"heuristic,":[20],"that":[21,112],"can":[22,119],"fit":[23],"in":[24,93,102,116],"both":[25],"session-based":[26],"session-less":[28],"environments,":[30],"has":[31,73],"been":[32,74],"used":[33,75],"to":[34,76],"select":[35,77],"the":[36,40,43,49,54,58,78,103,126],"concurrency":[38],"between":[39],"dies":[41,83],"of":[42,53,81,91,96,107],"stack.":[44],"The":[45],"proposed":[46],"method":[47],"minimizes":[48],"overall":[50,104],"time":[52,106,118],"stack,":[55],"without":[56],"violating":[57],"system":[59],"level":[60],"resource":[61,79],"limits.":[64],"Particle":[65],"Swarm":[66],"Optimization":[67],"(PSO)":[68],"meta":[70],"search":[71],"technique":[72],"allocation":[80],"individual":[82],"also":[85],"their":[86],"internal":[87],"schedules.":[89],"Incorporation":[90],"PSO":[92],"two":[94],"stages":[95],"produces":[98],"notable":[100],"reduction":[101,115],"SIC.":[108],"Experimental":[109],"results":[110],"show":[111],"upto":[113],"51%":[114],"be":[120],"achieved":[121],"using":[122],"our":[123],"strategy,":[124],"over":[125],"existing":[127],"techniques.":[128]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
