{"id":"https://openalex.org/W2043867873","doi":"https://doi.org/10.1109/vts.2014.6818791","title":"Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits","display_name":"Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits","publication_year":2014,"publication_date":"2014-04-01","ids":{"openalex":"https://openalex.org/W2043867873","doi":"https://doi.org/10.1109/vts.2014.6818791","mag":"2043867873"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2014.6818791","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2014.6818791","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044863803","display_name":"Sabyasachi Deyati","orcid":"https://orcid.org/0000-0001-9172-2495"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sabyasachi Deyati","raw_affiliation_strings":["Electrical & Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical & Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088382365","display_name":"Barry Muldrey","orcid":"https://orcid.org/0000-0003-2052-6096"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Barry J. Muldrey","raw_affiliation_strings":["Electrical & Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical & Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014516145","display_name":"A. Banerjee","orcid":"https://orcid.org/0000-0001-7671-9669"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Aritra Banerjee","raw_affiliation_strings":["Electrical & Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical & Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069579193","display_name":"Abhijit Chatterjee","orcid":"https://orcid.org/0000-0003-1553-4470"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Abhijit Chatterjee","raw_affiliation_strings":["Electrical & Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical & Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"50","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.8462486863136292},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7101434469223022},{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.5284464359283447},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.48054152727127075},{"id":"https://openalex.org/keywords/signal-flow-graph","display_name":"Signal-flow graph","score":0.4797198176383972},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4544232189655304},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.4541388154029846},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4294387102127075},{"id":"https://openalex.org/keywords/a-priori-and-a-posteriori","display_name":"A priori and a posteriori","score":0.41355323791503906},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.399029016494751},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3426136374473572},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22411149740219116},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1738101840019226},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1004413366317749},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08885672688484192}],"concepts":[{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.8462486863136292},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7101434469223022},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.5284464359283447},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.48054152727127075},{"id":"https://openalex.org/C166501922","wikidata":"https://www.wikidata.org/wiki/Q1786523","display_name":"Signal-flow graph","level":2,"score":0.4797198176383972},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4544232189655304},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.4541388154029846},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4294387102127075},{"id":"https://openalex.org/C75553542","wikidata":"https://www.wikidata.org/wiki/Q178161","display_name":"A priori and a posteriori","level":2,"score":0.41355323791503906},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.399029016494751},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3426136374473572},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22411149740219116},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1738101840019226},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1004413366317749},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08885672688484192},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2014.6818791","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2014.6818791","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W2007525669","https://openalex.org/W2037745308","https://openalex.org/W2042692297","https://openalex.org/W2060639108","https://openalex.org/W2062608908","https://openalex.org/W2077969919","https://openalex.org/W2084311952","https://openalex.org/W2101056461","https://openalex.org/W2116480795","https://openalex.org/W2119318133","https://openalex.org/W2124393844","https://openalex.org/W2138551019","https://openalex.org/W2149237884","https://openalex.org/W2151924912","https://openalex.org/W2158916100","https://openalex.org/W2169617819","https://openalex.org/W4212863985","https://openalex.org/W4243226372"],"related_works":["https://openalex.org/W4321442002","https://openalex.org/W2015265939","https://openalex.org/W2284072287","https://openalex.org/W2611067230","https://openalex.org/W2480201319","https://openalex.org/W2387706296","https://openalex.org/W2035871485","https://openalex.org/W2800543810","https://openalex.org/W2122674270","https://openalex.org/W4365793791"],"abstract_inverted_index":{"As":[0,35],"RF":[1],"design":[2,33,56,107,127,143],"scales":[3],"to":[4,23,42,54,105,131,176],"the":[5,24,86,126,139,142,151,154,164,167,196],"28nm":[6],"technology":[7],"node":[8],"and":[9,13,32,47,58,78,109,187,193],"beyond,":[10],"pre-silicon":[11],"simulation":[12],"verification":[14],"of":[15,61,125,153,166,195],"complex":[16,62],"mixed-signal/RF":[17],"SoCs":[18],"is":[19,39,70,98,145,148,169],"becoming":[20],"intractable":[21],"due":[22],"difficulties":[25],"associated":[26],"with":[27,159],"simulating":[28],"diverse":[29],"electrical":[30,63],"effects":[31],"bugs.":[34],"a":[36,92,177,183],"consequence,":[37],"there":[38],"increasing":[40],"pressure":[41],"develop":[43],"comprehensive":[44],"post-silicon":[45],"test":[46],"debug":[48,87],"tools":[49],"that":[50,100,141,150,190],"can":[51,81,156],"be":[52,82,157],"used":[53],"identify":[55],"bugs":[57,76,108],"improve":[59],"modeling":[60,115],"nonidealities":[64],"observed":[65],"in":[66],"silicon.":[67],"Often,":[68],"it":[69,147],"not":[71],"known":[72],"a-priori":[73],"what":[74],"these":[75],"are":[77,120,199],"how":[79],"they":[80],"modeled,":[83],"significantly":[84],"complicating":[85],"process.":[88],"In":[89],"this":[90],"research,":[91],"new":[93],"atomic":[94],"model":[95,118],"learning":[96,103],"approach":[97,198],"proposed":[99,197],"uses":[101],"supervised":[102],"techniques":[104],"diagnose":[106],"learn":[110,132],"unknown":[111,133],"module-level":[112],"behaviors.":[113],"Nonideality":[114],"artifacts":[116],"called":[117],"atoms":[119],"inserted":[121],"into":[122],"different":[123],"nodes":[124],"signal":[128],"flow":[129],"paths":[130],"behaviors":[134],"along":[135],"those":[136],"paths.":[137],"Under":[138],"assumption":[140],"bug":[144,155,168],"localized,":[146],"shown":[149],"source":[152],"identified":[158],"high":[160],"resolution":[161],"even":[162],"when":[163],"nature":[165],"unknown.":[170],"The":[171],"method":[172],"has":[173],"been":[174],"applied":[175],"conventional":[178],"wireless":[179],"as":[180,182],"well":[181],"polar":[184],"radio":[185],"transmitter":[186],"key":[188],"results":[189],"demonstrate":[191],"usefulness":[192],"feasibility":[194],"presented.":[200]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}