{"id":"https://openalex.org/W2019893821","doi":"https://doi.org/10.1109/vts.2014.6818787","title":"A 4-GHz universal high-frequency on-chip testing platform for IP validation","display_name":"A 4-GHz universal high-frequency on-chip testing platform for IP validation","publication_year":2014,"publication_date":"2014-04-01","ids":{"openalex":"https://openalex.org/W2019893821","doi":"https://doi.org/10.1109/vts.2014.6818787","mag":"2019893821"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2014.6818787","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2014.6818787","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063911057","display_name":"Ping-Lin Yang","orcid":"https://orcid.org/0000-0002-6723-8190"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Ping-Lin Yang","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038860671","display_name":"Cheng-Chung Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng-Chung Lin","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011632198","display_name":"Ming-Zhang Kuo","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ming-Zhang Kuo","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109215102","display_name":"S.H. Dhong","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Sang-Hoo Dhong","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102152617","display_name":"Chien-Min Lin","orcid":"https://orcid.org/0009-0003-0913-1090"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chien-Min Lin","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062092411","display_name":"Kevin Huang","orcid":"https://orcid.org/0000-0003-2718-2214"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kevin Huang","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113691309","display_name":"Ching-Nen Peng","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ching-Nen Peng","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086368713","display_name":"Min-Jer Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Min-Jer Wang","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC), Hsinchu, R.O.C","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company (TSMC) Hsinchu, Taiwan, R.O.C","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5063911057"],"corresponding_institution_ids":["https://openalex.org/I4210120917"],"apc_list":null,"apc_paid":null,"fwci":0.9194,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.74640766,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.701662540435791},{"id":"https://openalex.org/keywords/digital-pattern-generator","display_name":"Digital pattern generator","score":0.6110381484031677},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5819978713989258},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.5332759618759155},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.5041064023971558},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4934326708316803},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.493431955575943},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49238574504852295},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.46112507581710815},{"id":"https://openalex.org/keywords/signal-generator","display_name":"Signal generator","score":0.4205136001110077},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41083985567092896},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3230918049812317},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.30611932277679443}],"concepts":[{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.701662540435791},{"id":"https://openalex.org/C151346624","wikidata":"https://www.wikidata.org/wiki/Q5276129","display_name":"Digital pattern generator","level":3,"score":0.6110381484031677},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5819978713989258},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.5332759618759155},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5041064023971558},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4934326708316803},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.493431955575943},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49238574504852295},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.46112507581710815},{"id":"https://openalex.org/C207912722","wikidata":"https://www.wikidata.org/wiki/Q1259123","display_name":"Signal generator","level":3,"score":0.4205136001110077},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41083985567092896},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3230918049812317},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.30611932277679443},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2014.6818787","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2014.6818787","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4099999964237213,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1487165447","https://openalex.org/W1905213452","https://openalex.org/W1999390703","https://openalex.org/W2074536737","https://openalex.org/W2102127226","https://openalex.org/W2114156871","https://openalex.org/W2143881398","https://openalex.org/W2152321821","https://openalex.org/W2165749494","https://openalex.org/W3149260006","https://openalex.org/W6677022219"],"related_works":["https://openalex.org/W2394143195","https://openalex.org/W2075985769","https://openalex.org/W2463482348","https://openalex.org/W1996478429","https://openalex.org/W2157130998","https://openalex.org/W2157122227","https://openalex.org/W2156809456","https://openalex.org/W1598002399","https://openalex.org/W2028613084","https://openalex.org/W2123022840"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"an":[3,40,67,72,120,133],"on-chip":[4,59,73,106],"intellectual":[5],"property":[6],"(IP)":[7],"testing":[8,30,34],"platform,":[9],"Universal":[10],"High":[11,151],"Frequency":[12],"Test":[13],"structure":[14],"(UHFTs),":[15],"which":[16],"makes":[17],"logic,":[18],"memory,":[19],"and":[20,63,83,117,139,164,172],"analog":[21,173],"/":[22],"mixed-signal":[23,171],"IPs":[24],"at-speed":[25,74,116],"testable":[26],"in":[27,95,119,148,159,186,191],"the":[28,105,112,126,137,168,192],"same":[29],"structure.":[31],"Any":[32],"functional":[33],"pattern":[35,42,70,78],"can":[36,79],"be":[37],"loaded":[38],"from":[39,111],"external":[41,134],"generator":[43],"or":[44,56],"a":[45,93,143,180],"tester":[46,135],"through":[47,136],"standard":[48],"5-pin":[49],"JTAG":[50,61,140],"interfaces":[51,141],"operating":[52],"at":[53],"10":[54],"MHz":[55],"below.":[57],"The":[58,77,109,123],"multichannel":[60],"interface":[62],"elastic":[64],"buffers":[65],"convert":[66],"externally":[68],"supplied":[69],"to":[71,92,104,132],"high-frequency":[75],"pattern.":[76],"have":[80,176],"address,":[81],"data,":[82],"control":[84],"fields.":[85],"Each":[86],"field":[87],"is":[88,114,129],"applied":[89],"as":[90],"input":[91],"DUT":[94,100,113],"anyone":[96],"of":[97,125,170,183],"16":[98],"available":[99],"sites,":[101],"fully":[102],"synchronized":[103],"global":[107],"clock.":[108],"output":[110,121,127],"captured":[115],"stored":[118],"buffer.":[122],"content":[124],"buffer":[128],"read":[130],"out":[131],"elastic-buffer":[138],"under":[142],"program":[144],"control.":[145],"UHFTs,":[146],"implemented":[147],"TSMC":[149,187],"28-nm":[150,188],"Performance":[152],"CMOS":[153,189],"process,":[154],"has":[155],"been":[156,177],"successfully":[157],"used":[158],"digital,":[160],"including":[161],"ATPG,":[162],"BIST,":[163],"vector-based":[165],"tests":[166],"with":[167,179],"capability":[169],"tests.":[174],"UHFTs":[175],"designed":[178],"frequency":[181],"goal":[182],"4":[184],"GHz":[185],"process":[190],"slow":[193],"corner.":[194]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
