{"id":"https://openalex.org/W1972623067","doi":"https://doi.org/10.1109/vts.2014.6818753","title":"Self-heating thermal-aware testing of FPGAs","display_name":"Self-heating thermal-aware testing of FPGAs","publication_year":2014,"publication_date":"2014-04-01","ids":{"openalex":"https://openalex.org/W1972623067","doi":"https://doi.org/10.1109/vts.2014.6818753","mag":"1972623067"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2014.6818753","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2014.6818753","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065580667","display_name":"Abdulazim Amouri","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Abdulazim Amouri","raw_affiliation_strings":["Karlsruher Institut fur Technologie, Karlsruhe, Baden-W\u00c3\u00bcrttemberg, DE","[Inst. of Comput. Eng., Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Karlsruher Institut fur Technologie, Karlsruhe, Baden-W\u00c3\u00bcrttemberg, DE","institution_ids":[]},{"raw_affiliation_string":"[Inst. of Comput. Eng., Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany]","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027953434","display_name":"Jochen Hepp","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jochen Hepp","raw_affiliation_strings":["Institute of Computer Engineering, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany","[Inst. of Comput. Eng., Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Computer Engineering, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]},{"raw_affiliation_string":"[Inst. of Comput. Eng., Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany]","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064445713","display_name":"Mehdi B. Tahoori","orcid":"https://orcid.org/0000-0002-8829-5610"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mehdi Tahoori","raw_affiliation_strings":["Institute of Computer Engineering, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany","[Inst. of Comput. Eng., Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Computer Engineering, Karlsruhe Institute of Technology (KIT), Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]},{"raw_affiliation_string":"[Inst. of Comput. Eng., Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany]","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I102335020"],"apc_list":null,"apc_paid":null,"fwci":1.8905,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.84705882,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8363157510757446},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6636983156204224},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.607522189617157},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5978532433509827},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5617309212684631},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.4554422199726105},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.42582231760025024},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.39694929122924805},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07912370562553406}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8363157510757446},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6636983156204224},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.607522189617157},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5978532433509827},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5617309212684631},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.4554422199726105},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.42582231760025024},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.39694929122924805},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07912370562553406},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2014.6818753","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2014.6818753","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.49000000953674316,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1978380131","https://openalex.org/W2022202043","https://openalex.org/W2075942097","https://openalex.org/W2090362256","https://openalex.org/W2117963121","https://openalex.org/W2132198387","https://openalex.org/W2150938931","https://openalex.org/W2158489063","https://openalex.org/W2162619013","https://openalex.org/W2169952903","https://openalex.org/W2247505141","https://openalex.org/W2278431897","https://openalex.org/W2281652697","https://openalex.org/W2494784533","https://openalex.org/W3141423035","https://openalex.org/W6683365909","https://openalex.org/W6683896646"],"related_works":["https://openalex.org/W2544043553","https://openalex.org/W2546284597","https://openalex.org/W2348562861","https://openalex.org/W2170552397","https://openalex.org/W2540393334","https://openalex.org/W2390042878","https://openalex.org/W2062932566","https://openalex.org/W2363944576","https://openalex.org/W2085828379","https://openalex.org/W2271847574"],"abstract_inverted_index":{"Field":[0],"Programmable":[1],"Gate":[2],"Arrays":[3],"(FPGAs)":[4],"are":[5,44,62,82,120,131,161],"designed":[6],"and":[7,19,29,136],"fabricated":[8],"using":[9],"the":[10,68,78,91,95,115,134,139,146,159],"most":[11],"advanced":[12],"CMOS":[13],"technology":[14],"nodes":[15],"to":[16,26,54,65,70,76,122,144,181],"meet":[17],"performance":[18],"power":[20],"demands.":[21],"This":[22],"makes":[23],"them":[24],"susceptible":[25],"many":[27,83],"manufacturing":[28],"reliability":[30,38],"challenges.":[31],"Increasing":[32],"chip":[33,48,69,173],"temperature":[34,73,148],"is":[35,111],"a":[36,71,97,103,168,187],"major":[37],"concern":[39],"since":[40],"various":[41],"failure":[42],"mechanisms":[43],"accelerated":[45],"at":[46],"high":[47,188],"temperature,":[49],"which":[50,89,114],"require":[51],"thermal-aware":[52,92,107],"testing":[53,93,108],"detect":[55],"them.":[56],"External":[57],"devices":[58,155],"like":[59],"thermal":[60],"chambers":[61],"usually":[63],"used":[64,121],"heat":[66],"up":[67,158,180],"desired":[72],"in":[74,113],"order":[75],"apply":[77],"test.":[79],"However,":[80],"there":[81],"limitations":[84],"for":[85,106,150,156],"these":[86],"external":[87,154],"devices,":[88],"make":[90],"of":[94,109,118,171],"FPGA":[96,119,135,160],"challenging":[98],"process.":[99],"In":[100],"this":[101],"paper,":[102],"self-heating":[104,125],"approach":[105],"FPGAs":[110],"presented,":[112],"internal":[116],"resources":[117],"build":[123],"controlled":[124,129],"elements":[126],"(SHEs).":[127],"These":[128],"SHEs":[130],"distributed":[132],"across":[133],"integrated":[137],"with":[138,186],"built-in":[140],"self-test":[141],"(BIST)":[142],"scheme":[143],"generate":[145],"required":[147],"profile":[149],"testing.":[151],"Thus,":[152],"no":[153],"heating":[157],"needed.":[162],"The":[163],"experimental":[164],"results":[165],"show":[166],"that":[167],"wide":[169],"range":[170],"maximum":[172],"temperatures":[174],"can":[175],"be":[176],"achieved":[177],"(from":[178],"50\u00b0C":[179],"125\u00b0C":[182],"on":[183],"Virtex-5":[184],"FPGA)":[185],"accuracy":[189],"(\u00b11\u00b0C).":[190]},"counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
