{"id":"https://openalex.org/W2027106028","doi":"https://doi.org/10.1109/vts.2013.6548943","title":"Innovative practices session 11C: Resilience","display_name":"Innovative practices session 11C: Resilience","publication_year":2013,"publication_date":"2013-04-01","ids":{"openalex":"https://openalex.org/W2027106028","doi":"https://doi.org/10.1109/vts.2013.6548943","mag":"2027106028"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2013.6548943","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2013.6548943","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"conference-abstract","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015839075","display_name":"Chen-Yong Cher","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chen-Yong Cher","raw_affiliation_strings":["IBM","IBM, ,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM","institution_ids":[]},{"raw_affiliation_string":"IBM, ,","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100709047","display_name":"Mohan Kumar","orcid":"https://orcid.org/0000-0002-4716-8076"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohan J. Kumar","raw_affiliation_strings":["Lead SW and RAS Architect, Intel DCSG","Lead SW and RAS Architect, Intel DCSG#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lead SW and RAS Architect, Intel DCSG","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Lead SW and RAS Architect, Intel DCSG#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12423","display_name":"Software Reliability and Analysis Research","score":0.9574000239372253,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12423","display_name":"Software Reliability and Analysis Research","score":0.9574000239372253,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9466000199317932,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9434999823570251,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7873297929763794},{"id":"https://openalex.org/keywords/session","display_name":"Session (web analytics)","score":0.703711748123169},{"id":"https://openalex.org/keywords/standardization","display_name":"Standardization","score":0.6834054589271545},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.6119945049285889},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5715080499649048},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5552072525024414},{"id":"https://openalex.org/keywords/resilience","display_name":"Resilience (materials science)","score":0.540481686592102},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5309526324272156},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.5017015933990479},{"id":"https://openalex.org/keywords/xeon","display_name":"Xeon","score":0.47537723183631897},{"id":"https://openalex.org/keywords/software-quality","display_name":"Software quality","score":0.4415138065814972},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.44008737802505493},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.428066223859787},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.3291530907154083},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.31491363048553467},{"id":"https://openalex.org/keywords/world-wide-web","display_name":"World Wide Web","score":0.10668084025382996}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7873297929763794},{"id":"https://openalex.org/C2779182362","wikidata":"https://www.wikidata.org/wiki/Q17126187","display_name":"Session (web analytics)","level":2,"score":0.703711748123169},{"id":"https://openalex.org/C188087704","wikidata":"https://www.wikidata.org/wiki/Q369577","display_name":"Standardization","level":2,"score":0.6834054589271545},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.6119945049285889},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5715080499649048},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5552072525024414},{"id":"https://openalex.org/C2779585090","wikidata":"https://www.wikidata.org/wiki/Q3457762","display_name":"Resilience (materials science)","level":2,"score":0.540481686592102},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5309526324272156},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5017015933990479},{"id":"https://openalex.org/C145108525","wikidata":"https://www.wikidata.org/wiki/Q656154","display_name":"Xeon","level":2,"score":0.47537723183631897},{"id":"https://openalex.org/C117447612","wikidata":"https://www.wikidata.org/wiki/Q1412670","display_name":"Software quality","level":4,"score":0.4415138065814972},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.44008737802505493},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.428066223859787},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3291530907154083},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.31491363048553467},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.10668084025382996},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2013.6548943","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2013.6548943","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2378767206","https://openalex.org/W1540871478","https://openalex.org/W328308450","https://openalex.org/W282641168","https://openalex.org/W2376963063","https://openalex.org/W2066396794","https://openalex.org/W2366734808","https://openalex.org/W2002476357","https://openalex.org/W2212955619","https://openalex.org/W3124296310"],"abstract_inverted_index":{"Software":[0],"Hardware":[1],"co-design":[2],"is":[3,16,20,31],"a":[4],"key":[5],"mechanism":[6],"to":[7,32],"realizing":[8],"reliability":[9],"at":[10],"platform":[11,72],"level.":[12],"While":[13],"error":[14],"avoidance":[15],"the":[17,39,63],"ideal,":[18],"it":[19],"not":[21],"always":[22],"practical":[23],"in":[24,35,41],"an":[25],"economic":[26],"sense.":[27],"Often":[28],"used":[29],"technique":[30],"detect":[33],"errors":[34],"hardware":[36],"and":[37,62],"implement":[38],"recovery":[40],"coordination":[42,53],"with":[43],"software.":[44],"This":[45],"talk":[46],"will":[47],"discuss":[48],"some":[49],"examples":[50],"of":[51,65,68],"such":[52,70],"on":[54],"Intel":[55],"Xeon":[56],"(e.g.,":[57],"DIMM":[58],"Sparing,":[59],"MCA":[60],"recovery)":[61],"implications":[64],"this":[66],"type":[67],"solution":[69],"as":[71],"validation,":[73],"interface":[74],"standardization,":[75],"software":[76],"enablement,":[77],"etc.":[78]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
