{"id":"https://openalex.org/W2065800224","doi":"https://doi.org/10.1109/vts.2013.6548909","title":"Trading off area, yield and performance via hybrid redundancy in multi-core architectures","display_name":"Trading off area, yield and performance via hybrid redundancy in multi-core architectures","publication_year":2013,"publication_date":"2013-04-01","ids":{"openalex":"https://openalex.org/W2065800224","doi":"https://doi.org/10.1109/vts.2013.6548909","mag":"2065800224"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2013.6548909","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2013.6548909","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st VLSI Test Symposium (VTS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100602494","display_name":"Yue Gao","orcid":"https://orcid.org/0000-0002-4971-590X"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Yue Gao","raw_affiliation_strings":["Ming Hsieh Department of Electrical Engineering, University of Southern California, USA","Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"Ming Hsieh Department of Electrical Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]},{"raw_affiliation_string":"Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100354813","display_name":"Yang Zhang","orcid":"https://orcid.org/0000-0003-4259-521X"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yang Zhang","raw_affiliation_strings":["Ming Hsieh Department of Electrical Engineering, University of Southern California, USA","Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"Ming Hsieh Department of Electrical Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]},{"raw_affiliation_string":"Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101934240","display_name":"Da Cheng","orcid":"https://orcid.org/0000-0002-5171-2134"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Da Cheng","raw_affiliation_strings":["Ming Hsieh Department of Electrical Engineering, University of Southern California, USA","Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"Ming Hsieh Department of Electrical Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]},{"raw_affiliation_string":"Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111192060","display_name":"M.A. Breuer","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. A. Breuer","raw_affiliation_strings":["Ming Hsieh Department of Electrical Engineering, University of Southern California, USA","Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"Ming Hsieh Department of Electrical Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]},{"raw_affiliation_string":"Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100602494"],"corresponding_institution_ids":["https://openalex.org/I1174212"],"apc_list":null,"apc_paid":null,"fwci":1.5761,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.83822873,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.8219095468521118},{"id":"https://openalex.org/keywords/spare-part","display_name":"Spare part","score":0.7232363224029541},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7183032631874084},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.4881947636604309},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4272877275943756},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39962905645370483},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.33579057455062866},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3314189016819},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14943689107894897},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.0998469889163971}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.8219095468521118},{"id":"https://openalex.org/C194648553","wikidata":"https://www.wikidata.org/wiki/Q1364774","display_name":"Spare part","level":2,"score":0.7232363224029541},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7183032631874084},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.4881947636604309},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4272877275943756},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39962905645370483},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.33579057455062866},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3314189016819},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14943689107894897},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0998469889163971},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2013.6548909","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2013.6548909","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st VLSI Test Symposium (VTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5799999833106995,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1990575577","https://openalex.org/W1991406672","https://openalex.org/W2004323062","https://openalex.org/W2035720033","https://openalex.org/W2058061684","https://openalex.org/W2073217565","https://openalex.org/W2079942837","https://openalex.org/W2099828501","https://openalex.org/W2104086123","https://openalex.org/W2104193172","https://openalex.org/W2104225326","https://openalex.org/W2114719509","https://openalex.org/W2125067970","https://openalex.org/W2138248165","https://openalex.org/W2145252892","https://openalex.org/W2149294210","https://openalex.org/W2152781336","https://openalex.org/W2157259709","https://openalex.org/W2161891759","https://openalex.org/W2171662132","https://openalex.org/W3139734642","https://openalex.org/W4205474030","https://openalex.org/W4231285887","https://openalex.org/W4233714602","https://openalex.org/W4244034697","https://openalex.org/W4245420982","https://openalex.org/W4254121524"],"related_works":["https://openalex.org/W2376859990","https://openalex.org/W2912704652","https://openalex.org/W2381161177","https://openalex.org/W2319226115","https://openalex.org/W830772239","https://openalex.org/W2970750595","https://openalex.org/W2366601680","https://openalex.org/W2344117897","https://openalex.org/W2053409898","https://openalex.org/W2133886031"],"abstract_inverted_index":{"Manufacturing":[0],"yield":[1,22,67],"is":[2,102],"a":[3,27,42,57,78,116,167],"major":[4],"concern":[5],"for":[6,21,26],"modern":[7,49],"CMOS":[8],"technologies.":[9],"Fortunately,":[10],"evolving":[11],"chip":[12],"architectures":[13],"such":[14],"as":[15],"multi-cores":[16],"have":[17],"provided":[18],"new":[19,43,186],"venues":[20],"enhancement,":[23],"and":[24,74,83,138,164],"calls":[25],"fresh":[28],"perspective":[29],"on":[30,81],"the":[31,86,90,125,128,135,151,154,172,178],"classic":[32],"method":[33],"of":[34,61,89,127,153,159],"redundancy":[35,46,55,95,120,175,202],"insertion.":[36],"In":[37],"this":[38,110],"paper":[39],"we":[40,112],"outline":[41],"approach":[44],"towards":[45],"insertion":[47,121,203],"in":[48,66,105,157,194],"multi-core":[50],"CPU":[51],"architectures.":[52,108],"Traditionally,":[53],"applying":[54],"at":[56],"finer":[58],"intra-core":[59],"level":[60,94],"granularity":[62],"provides":[63,189],"great":[64],"benefits":[65],"improvement,":[68],"but":[69,100],"requires":[70],"additional":[71],"steering":[72],"logic":[73],"wiring":[75],"that":[76,123,184],"has":[77],"detrimental":[79],"impact":[80],"area":[82,137],"performance.":[84],"At":[85],"other":[87],"end":[88],"spectrum,":[91],"coarse-grained":[92],"core":[93],"can":[96],"enable":[97],"spare":[98,118],"sharing,":[99],"it":[101],"only":[103],"beneficial":[104],"highly-parallel":[106],"GPU":[107],"To":[109],"end,":[111],"will":[113],"1)":[114],"introduce":[115,166],"hybrid":[117],"sharing":[119],"scheme":[122],"combines":[124],"advantages":[126],"above":[129],"two":[130],"approaches,":[131],"while":[132],"carefully":[133],"leveraging":[134],"associated":[136],"performance":[139],"overheads,":[140],"2)":[141],"present":[142],"an":[143],"extensively":[144],"verified,":[145],"systematic":[146],"scalable":[147],"model":[148],"to":[149,170,199],"evaluate":[150],"quality":[152],"final":[155],"design":[156,179,187],"terms":[158],"projected":[160],"revenue":[161,195],"per":[162,196],"wafer,":[163,197],"3)":[165],"maximization":[168],"algorithm":[169],"determine":[171],"near":[173],"optimal":[174],"configurations":[176],"during":[177],"stage.":[180],"Experimental":[181],"results":[182],"show":[183],"our":[185],"methodology":[188],"more":[190],"than":[191],"15%":[192],"improvement":[193],"compared":[198],"using":[200],"existing":[201],"techniques.":[204]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
