{"id":"https://openalex.org/W2157521416","doi":"https://doi.org/10.1109/vts.2002.1011155","title":"Eigen-signatures for regularity-based IDDQ testing","display_name":"Eigen-signatures for regularity-based IDDQ testing","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2157521416","doi":"https://doi.org/10.1109/vts.2002.1011155","mag":"2157521416"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2002.1011155","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011155","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079106254","display_name":"Yukio Okuda","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Y. Okuda","raw_affiliation_strings":["S&S Architecture Center, Sony Corporation, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"S&S Architecture Center, Sony Corporation, Tokyo, Japan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5079106254"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.7608,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.85913298,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"289","last_page":"294"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/iddq-testing","display_name":"Iddq testing","score":0.9405181407928467},{"id":"https://openalex.org/keywords/test-vector","display_name":"Test vector","score":0.48893943428993225},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.48606207966804504},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.45787498354911804},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.430732786655426},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.3865470290184021},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3448193073272705},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31911784410476685},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.16171547770500183},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.15855619311332703}],"concepts":[{"id":"https://openalex.org/C206678392","wikidata":"https://www.wikidata.org/wiki/Q5987815","display_name":"Iddq testing","level":3,"score":0.9405181407928467},{"id":"https://openalex.org/C100767440","wikidata":"https://www.wikidata.org/wiki/Q7705816","display_name":"Test vector","level":3,"score":0.48893943428993225},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.48606207966804504},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.45787498354911804},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.430732786655426},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.3865470290184021},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3448193073272705},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31911784410476685},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.16171547770500183},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.15855619311332703},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2002.1011155","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011155","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1488870485","https://openalex.org/W1550706090","https://openalex.org/W1880721252","https://openalex.org/W1985533622","https://openalex.org/W2141491963","https://openalex.org/W2147198689","https://openalex.org/W4247409213","https://openalex.org/W6829579079"],"related_works":["https://openalex.org/W2028462208","https://openalex.org/W2091062719","https://openalex.org/W2169873855","https://openalex.org/W2150448461","https://openalex.org/W2154177135","https://openalex.org/W1993975811","https://openalex.org/W2082374775","https://openalex.org/W3149436319","https://openalex.org/W2366913214","https://openalex.org/W2164135279"],"abstract_inverted_index":{"Researchers":[0],"and":[1,59,86,117],"test":[2,17,47,101,130],"engineers":[3],"challenge":[4],"I/sub":[5,21,35,39,73,84,95,110,143],"DDQ/":[6,22,36,40,74,96,111,144],"testing":[7],"on":[8,29,45,65,89],"deep":[9],"submicron":[10],"(DSM)":[11],"devices.":[12],"We":[13],"have":[14,104,113],"proposed":[15],"to":[16,99],"devices":[18],"with":[19],"high":[20],"currents":[23],"at":[24],"normal":[25],"operating":[26],"conditions":[27],"based":[28,64],"exploiting":[30],"the":[31,38,53,57,94,109,118,126,129,137,142],"regularity":[32,58],"of":[33,42,56,78,123,139],"defect-free":[34],"signatures,":[37],"responses":[41],"a":[43,46,61,90,100,105,114],"circuit":[44],"vector":[48,102],"set.":[49],"This":[50],"paper":[51],"demonstrates":[52],"fundamental":[54],"characteristics":[55],"proposes":[60],"new":[62],"methodology":[63],"eigen-signatures.":[66],"Eigen-signatures":[67],"are":[68],"unique":[69],"signatures":[70],"transformed":[71],"from":[72],"signatures.":[75],"The":[76],"analysis":[77],"five":[79],"eigen-signatures,":[80],"including":[81],"enhanced":[82],"\"Delta":[83],"DDQ/\"":[85],"\"Current":[87],"Ratios,\"":[88],"product":[91],"indicates":[92],"that:":[93],"values":[97],"related":[98],"set":[103],"small":[106],"variation,":[107],"whereas,":[108],"magnitudes":[112],"large":[115],"variation;":[116],"defect":[119],"current":[120],"prediction":[121],"error":[122,138],"methods":[124,140],"focusing":[125,141],"changes":[127],"between":[128],"vectors":[131],"is":[132],"23":[133],"times":[134],"smaller":[135],"than":[136],"magnitudes.":[145]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}