{"id":"https://openalex.org/W2116794285","doi":"https://doi.org/10.1109/vts.2002.1011152","title":"Is state mapping essential for equivalence checking custom memories in scan-based designs?","display_name":"Is state mapping essential for equivalence checking custom memories in scan-based designs?","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2116794285","doi":"https://doi.org/10.1109/vts.2002.1011152","mag":"2116794285"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2002.1011152","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011152","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112415263","display_name":"Narayanan Krishnamurthy","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N. Krishnamurthy","raw_affiliation_strings":["ASP Motorola, Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ASP Motorola, Austin, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108522396","display_name":"J. Bhadra","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Bhadra","raw_affiliation_strings":["ASP Motorola, Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ASP Motorola, Austin, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011349515","display_name":"Magdy S. Abadir","orcid":"https://orcid.org/0000-0003-4046-2472"},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M.S. Abadir","raw_affiliation_strings":["ASP Motorola, Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ASP Motorola, Austin, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068070739","display_name":"Jacob A. Abraham","orcid":"https://orcid.org/0000-0002-5336-5631"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.A. Abraham","raw_affiliation_strings":["University of Texas, Austin, Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas, Austin, Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"275","last_page":"280"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/formal-equivalence-checking","display_name":"Formal equivalence checking","score":0.8391612768173218},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7278000116348267},{"id":"https://openalex.org/keywords/equivalence","display_name":"Equivalence (formal languages)","score":0.6184046864509583},{"id":"https://openalex.org/keywords/powerpc","display_name":"PowerPC","score":0.5273289084434509},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.5111296772956848},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.48298799991607666},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.4776138961315155},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4699685275554657},{"id":"https://openalex.org/keywords/ibm","display_name":"IBM","score":0.4492899775505066},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.442781925201416},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.4323641359806061},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33701175451278687},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3335767984390259},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3209248185157776},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11999702453613281},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.09684509038925171}],"concepts":[{"id":"https://openalex.org/C96654402","wikidata":"https://www.wikidata.org/wiki/Q5469962","display_name":"Formal equivalence checking","level":3,"score":0.8391612768173218},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7278000116348267},{"id":"https://openalex.org/C2780069185","wikidata":"https://www.wikidata.org/wiki/Q7977945","display_name":"Equivalence (formal languages)","level":2,"score":0.6184046864509583},{"id":"https://openalex.org/C56005371","wikidata":"https://www.wikidata.org/wiki/Q209860","display_name":"PowerPC","level":3,"score":0.5273289084434509},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.5111296772956848},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.48298799991607666},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.4776138961315155},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4699685275554657},{"id":"https://openalex.org/C70388272","wikidata":"https://www.wikidata.org/wiki/Q5968558","display_name":"IBM","level":2,"score":0.4492899775505066},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.442781925201416},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.4323641359806061},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33701175451278687},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3335767984390259},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3209248185157776},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11999702453613281},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.09684509038925171},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2002.1011152","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011152","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W146581358","https://openalex.org/W1599313551","https://openalex.org/W1986558678","https://openalex.org/W2000498093","https://openalex.org/W2028225730","https://openalex.org/W2083897388","https://openalex.org/W2120498916","https://openalex.org/W2132055325","https://openalex.org/W2151940902","https://openalex.org/W4245295230","https://openalex.org/W6605978717","https://openalex.org/W6657710334"],"related_works":["https://openalex.org/W2152752131","https://openalex.org/W2122355433","https://openalex.org/W2106507440","https://openalex.org/W2105710452","https://openalex.org/W2162615969","https://openalex.org/W4243217047","https://openalex.org/W2096723742","https://openalex.org/W4231007409","https://openalex.org/W1547517160","https://openalex.org/W1483297389"],"abstract_inverted_index":{"Equivalence":[0,27],"checking":[1,28,99,138,162],"between":[2,40,107,116],"Register":[3],"Transfer":[4],"Level":[5],"(RTL)":[6],"descriptions":[7,11],"and":[8,81,119,150],"transistor":[9,121],"level":[10],"of":[12,23,37,49,123,153,158,169,174,180],"custom":[13,79,124,176],"memories":[14,179],"is":[15],"an":[16],"important":[17],"step":[18],"in":[19,77],"the":[20,35,41,108,113,117,120,148,159,175],"design":[21],"flow":[22],"high":[24],"performance":[25],"microprocessors.":[26],"can":[29,74,94,131],"be":[30,75,95,132],"done":[31],"with":[32,166,186],"or":[33],"without":[34,86],"knowledge":[36],"state":[38,50,87,105,114],"mapping":[39],"two":[42,109,160],"descriptions.":[43,110],"We":[44,89,145,164],"present":[45,76],"evidence":[46],"that":[47,58,62,73,82,91,101],"because":[48],"mapping,":[51],"our":[52],"verification":[53],"technique":[54],"exercises":[55],"system":[56],"behavior":[57],"exposes":[59],"hard-to-detect":[60,85],"bugs":[61,93],"might":[63],"otherwise":[64],"go":[65],"undetected.":[66],"This":[67],"paper":[68],"defines":[69],"Crossover":[70],"Bugs":[71],"(CB's)":[72],"scan-based":[78],"designs":[80],"are":[83],"inherently":[84],"mapping.":[88],"demonstrate":[90],"such":[92,140],"missed":[96],"by":[97],"equivalence":[98,129,137,161],"techniques":[100],"do":[102],"not":[103],"have":[104],"mappings":[106],"By":[111],"identifying":[112],"correspondences":[115],"RTL":[118],"implementation":[122],"memories,":[125],"a":[126],"more":[127],"rigorous":[128],"check":[130],"performed":[133],"compared":[134],"to":[135],"traditional":[136],"methods":[139],"as":[141],"product":[142],"machine":[143],"constructions.":[144],"also":[146],"compare":[147],"time":[149],"memory":[151],"complexities":[152],"crossover":[154],"bug":[155],"detection":[156,171],"capability":[157],"approaches.":[163],"conclude":[165],"experimental":[167],"results":[168],"CB":[170],"on":[172],"some":[173],"designed":[177],"embedded":[178],"Motorola's":[181],"MPC":[182],"7455":[183],"microprocessor":[184],"(compliant":[185],"IBM's":[187],"PowerPC":[188],"instruction":[189],"set":[190],"architecture).":[191]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}