{"id":"https://openalex.org/W2147922245","doi":"https://doi.org/10.1109/vts.2002.1011140","title":"Timing jitter measurement of 10 Gbps bit clock signals using frequency division","display_name":"Timing jitter measurement of 10 Gbps bit clock signals using frequency division","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2147922245","doi":"https://doi.org/10.1109/vts.2002.1011140","mag":"2147922245"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2002.1011140","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011140","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010763159","display_name":"Takahiro Yamaguchi","orcid":"https://orcid.org/0000-0003-0325-8878"},"institutions":[{"id":"https://openalex.org/I4210103901","display_name":"Advantest (Japan)","ror":"https://ror.org/01bvpmp82","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210103901"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"T.J. Yamaguchi","raw_affiliation_strings":["Advantest Laboratories Limited, Sendai, Miyagi, Japan"],"affiliations":[{"raw_affiliation_string":"Advantest Laboratories Limited, Sendai, Miyagi, Japan","institution_ids":["https://openalex.org/I4210103901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112265787","display_name":"M. Soma","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Soma","raw_affiliation_strings":["Department of Electrical Engineering, University of Washington, Seattle, WA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077985785","display_name":"L. Malarsie","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"L. Malarsie","raw_affiliation_strings":["Agere Systems, Inc., South Portland, ME, USA"],"affiliations":[{"raw_affiliation_string":"Agere Systems, Inc., South Portland, ME, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000723708","display_name":"M. Ishida","orcid":"https://orcid.org/0000-0003-1388-1284"},"institutions":[{"id":"https://openalex.org/I4210103901","display_name":"Advantest (Japan)","ror":"https://ror.org/01bvpmp82","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210103901"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Ishida","raw_affiliation_strings":["Advantest Laboratories Limited, Sendai, Miyagi, Japan"],"affiliations":[{"raw_affiliation_string":"Advantest Laboratories Limited, Sendai, Miyagi, Japan","institution_ids":["https://openalex.org/I4210103901"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042878450","display_name":"H. Musha","orcid":null},"institutions":[{"id":"https://openalex.org/I4210103901","display_name":"Advantest (Japan)","ror":"https://ror.org/01bvpmp82","country_code":"JP","type":"company","lineage":["https://openalex.org/I4210103901"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Musha","raw_affiliation_strings":["Advantest Corporation, Gunma, Japan"],"affiliations":[{"raw_affiliation_string":"Advantest Corporation, Gunma, Japan","institution_ids":["https://openalex.org/I4210103901"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5010763159"],"corresponding_institution_ids":["https://openalex.org/I4210103901"],"apc_list":null,"apc_paid":null,"fwci":6.2594,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.96804208,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"16","issue":null,"first_page":"207","last_page":"212"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.986299991607666,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9779999852180481,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9552167654037476},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6654436588287354},{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.6478390693664551},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5610689520835876},{"id":"https://openalex.org/keywords/division","display_name":"Division (mathematics)","score":0.5550626516342163},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.5458276271820068},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.5275297164916992},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5075160264968872},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.4827091693878174},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.46004772186279297},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.25383877754211426},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.20002764463424683},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16989383101463318},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12032487988471985},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.10859963297843933}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9552167654037476},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6654436588287354},{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.6478390693664551},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5610689520835876},{"id":"https://openalex.org/C60798267","wikidata":"https://www.wikidata.org/wiki/Q1226939","display_name":"Division (mathematics)","level":2,"score":0.5550626516342163},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.5458276271820068},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.5275297164916992},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5075160264968872},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.4827091693878174},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.46004772186279297},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.25383877754211426},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.20002764463424683},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16989383101463318},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12032487988471985},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.10859963297843933},{"id":"https://openalex.org/C202988678","wikidata":"https://www.wikidata.org/wiki/Q1417986","display_name":"Power dividers and directional couplers","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2002.1011140","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011140","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1557528591","https://openalex.org/W1667165204","https://openalex.org/W1766888123","https://openalex.org/W2145540234","https://openalex.org/W2160236891","https://openalex.org/W2161283733","https://openalex.org/W2169790941"],"related_works":["https://openalex.org/W2052455055","https://openalex.org/W331180034","https://openalex.org/W1487986186","https://openalex.org/W1506442459","https://openalex.org/W2090237663","https://openalex.org/W2224788396","https://openalex.org/W4386968318","https://openalex.org/W2158864330","https://openalex.org/W4247089581","https://openalex.org/W2114711633"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,25,62],"new":[4],"method":[5,23,54],"for":[6,50],"measuring":[7],"timing":[8,46],"jitter":[9,47],"of":[10,35],"the":[11,30,33,40,45,58],"bit":[12],"clock":[13,36],"signal":[14],"in":[15],"telecommunication":[16],"devices":[17],"operating":[18],"at":[19],"10":[20],"Gbps.":[21],"The":[22,48],"uses":[24],"divide-by-M":[26],"circuit":[27],"to":[28,43],"reduce":[29],"frequency":[31,52],"and":[32,38],"number":[34],"samples,":[37],"applies":[39],"Hilbert":[41],"transform":[42],"measure":[44],"theory":[49],"this":[51],"division":[53],"is":[55],"supported":[56],"by":[57],"experimental":[59],"data":[60],"from":[61],"serializer-deserializer":[63],"device.":[64]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}