{"id":"https://openalex.org/W2154319762","doi":"https://doi.org/10.1109/vts.2002.1011126","title":"On using efficient test sequences for BIST","display_name":"On using efficient test sequences for BIST","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2154319762","doi":"https://doi.org/10.1109/vts.2002.1011126","mag":"2154319762"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2002.1011126","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011126","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"R. David","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"R. David","raw_affiliation_strings":["Laboratoire d''Automatique de Grenoble, Saint Martin d'Heres, France"],"affiliations":[{"raw_affiliation_string":"Laboratoire d''Automatique de Grenoble, Saint Martin d'Heres, France","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005116115","display_name":"Patrick Girard","orcid":"https://orcid.org/0000-0003-0722-8772"},"institutions":[{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"P. Girard","raw_affiliation_strings":["De Robotique et de Micro\u00e9lectronique de Montpellier, Laboratoire d''Informatique, France"],"affiliations":[{"raw_affiliation_string":"De Robotique et de Micro\u00e9lectronique de Montpellier, Laboratoire d''Informatique, France","institution_ids":["https://openalex.org/I4210101743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071534551","display_name":"C. Landrault","orcid":null},"institutions":[{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"C. Landrault","raw_affiliation_strings":["De Robotique et de Micro\u00e9lectronique de Montpellier, Laboratoire d''Informatique, France"],"affiliations":[{"raw_affiliation_string":"De Robotique et de Micro\u00e9lectronique de Montpellier, Laboratoire d''Informatique, France","institution_ids":["https://openalex.org/I4210101743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041515093","display_name":"S. Pravossoudovitch","orcid":null},"institutions":[{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"S. Pravossoudovitch","raw_affiliation_strings":["De Robotique et de Micro\u00e9lectronique de Montpellier, Laboratoire d''Informatique, France"],"affiliations":[{"raw_affiliation_string":"De Robotique et de Micro\u00e9lectronique de Montpellier, Laboratoire d''Informatique, France","institution_ids":["https://openalex.org/I4210101743"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089236739","display_name":"A. Virazel","orcid":"https://orcid.org/0000-0001-7398-7107"},"institutions":[{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"A. Virazel","raw_affiliation_strings":["De Robotique et de Micro\u00e9lectronique de Montpellier, Laboratoire d''Informatique, France"],"affiliations":[{"raw_affiliation_string":"De Robotique et de Micro\u00e9lectronique de Montpellier, Laboratoire d''Informatique, France","institution_ids":["https://openalex.org/I4210101743"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9909,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.77812091,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"145","last_page":"150"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.7526952028274536},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6786660552024841},{"id":"https://openalex.org/keywords/linear-feedback-shift-register","display_name":"Linear feedback shift register","score":0.622286319732666},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5875862836837769},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.5688443779945374},{"id":"https://openalex.org/keywords/test-vector","display_name":"Test vector","score":0.5345010161399841},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.4412074089050293},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4325343072414398},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4111621379852295},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.37371891736984253},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.36539655923843384},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.3219400644302368},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17933973670005798},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12592044472694397},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0766991376876831},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.07221928238868713}],"concepts":[{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.7526952028274536},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6786660552024841},{"id":"https://openalex.org/C159862308","wikidata":"https://www.wikidata.org/wiki/Q681101","display_name":"Linear feedback shift register","level":4,"score":0.622286319732666},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5875862836837769},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.5688443779945374},{"id":"https://openalex.org/C100767440","wikidata":"https://www.wikidata.org/wiki/Q7705816","display_name":"Test vector","level":3,"score":0.5345010161399841},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.4412074089050293},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4325343072414398},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4111621379852295},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.37371891736984253},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.36539655923843384},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.3219400644302368},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17933973670005798},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12592044472694397},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0766991376876831},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.07221928238868713},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/vts.2002.1011126","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011126","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:lirmm-00268499v1","is_oa":false,"landing_page_url":"https://hal-lirmm.ccsd.cnrs.fr/lirmm-00268499","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"VTS: VLSI Test Symposium, 2002, Monterey, CA, United States. pp.145-150","raw_type":"Conference papers"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.6299999952316284,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W327215","https://openalex.org/W13277579","https://openalex.org/W603405442","https://openalex.org/W1524490503","https://openalex.org/W1554885925","https://openalex.org/W1905213452","https://openalex.org/W1976062726","https://openalex.org/W1985476435","https://openalex.org/W2026037646","https://openalex.org/W2096007426","https://openalex.org/W2112978605","https://openalex.org/W2148015755","https://openalex.org/W2153253425","https://openalex.org/W2157111192","https://openalex.org/W2167925462","https://openalex.org/W2480740748","https://openalex.org/W2533622023","https://openalex.org/W2542612625","https://openalex.org/W2936804578","https://openalex.org/W2937826712","https://openalex.org/W3099826813","https://openalex.org/W6600530048","https://openalex.org/W6631793748"],"related_works":["https://openalex.org/W2152745368","https://openalex.org/W2184933991","https://openalex.org/W2119351822","https://openalex.org/W4252072603","https://openalex.org/W4288754393","https://openalex.org/W2188176208","https://openalex.org/W2761883387","https://openalex.org/W2133482355","https://openalex.org/W2080947141","https://openalex.org/W2154529098"],"abstract_inverted_index":{"High":[0],"defect":[1],"coverage":[2,5],"requires":[3],"good":[4],"of":[6],"different":[7],"fault":[8],"types.":[9],"In":[10],"this":[11],"paper,":[12],"we":[13],"present":[14],"a":[15,49],"comprehensive":[16],"test":[17,52],"vector":[18],"generation":[19,53],"technique":[20],"for":[21,37],"BIST,":[22],"called":[23],"Random":[24],"Single":[25],"Input":[26],"Change":[27],"(RSIC)":[28],"generation,":[29],"that":[30,41],"can":[31,42],"be":[32],"used":[33],"to":[34],"generate":[35],"tests":[36],"many":[38],"arbitrary":[39],"misbehaviors":[40],"occur":[43],"in":[44],"digital":[45],"systems,":[46],"thus":[47],"providing":[48],"single":[50],"on-chip":[51],"solution.":[54]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":4}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}