{"id":"https://openalex.org/W2102127226","doi":"https://doi.org/10.1109/vts.2002.1011103","title":"Novel techniques for achieving high at-speed transition fault test coverage for Motorola's microprocessors based on PowerPC/spl trade/ instruction set architecture","display_name":"Novel techniques for achieving high at-speed transition fault test coverage for Motorola's microprocessors based on PowerPC/spl trade/ instruction set architecture","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2102127226","doi":"https://doi.org/10.1109/vts.2002.1011103","mag":"2102127226"},"language":"en","primary_location":{"id":"doi:10.1109/vts.2002.1011103","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011103","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109112987","display_name":"N. Tendolkar","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N. Tendolkar","raw_affiliation_strings":["Motorola, Inc., Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Motorola, Inc., Austin, TX, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068015411","display_name":"R. Raina","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Raina","raw_affiliation_strings":["Motorola, Inc., Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Motorola, Inc., Austin, TX, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040917020","display_name":"R. Woltenberg","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. Woltenberg","raw_affiliation_strings":["Motorola, Inc., Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Motorola, Inc., Austin, TX, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100539528","display_name":"Xijiang Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xijiang Lin","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067725283","display_name":"Bruce Swanson","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Swanson","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023514723","display_name":"G. Aldrich","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Aldrich","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":8.6711,"has_fulltext":false,"cited_by_count":77,"citation_normalized_percentile":{"value":0.98072605,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"3","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/powerpc","display_name":"PowerPC","score":0.9895045757293701},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.8037206530570984},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.6391854882240295},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.6375712752342224},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5179099440574646},{"id":"https://openalex.org/keywords/code-coverage","display_name":"Code coverage","score":0.4842645525932312},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.47694888710975647},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45774975419044495},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4373719394207001},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.430858850479126},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.42070090770721436},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.414841890335083},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.41334325075149536},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.4074423313140869},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.17362672090530396},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16733220219612122},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.11711660027503967},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.06198236346244812}],"concepts":[{"id":"https://openalex.org/C56005371","wikidata":"https://www.wikidata.org/wiki/Q209860","display_name":"PowerPC","level":3,"score":0.9895045757293701},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.8037206530570984},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6391854882240295},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.6375712752342224},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5179099440574646},{"id":"https://openalex.org/C53942775","wikidata":"https://www.wikidata.org/wiki/Q1211721","display_name":"Code coverage","level":3,"score":0.4842645525932312},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47694888710975647},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45774975419044495},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4373719394207001},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.430858850479126},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.42070090770721436},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.414841890335083},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41334325075149536},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4074423313140869},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.17362672090530396},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16733220219612122},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.11711660027503967},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.06198236346244812},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vts.2002.1011103","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vts.2002.1011103","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 20th IEEE VLSI Test Symposium (VTS 2002)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W30844492","https://openalex.org/W2043411903","https://openalex.org/W2096146619","https://openalex.org/W2105809177","https://openalex.org/W2165157401","https://openalex.org/W4230433944","https://openalex.org/W4256080835","https://openalex.org/W6601278884"],"related_works":["https://openalex.org/W1868476908","https://openalex.org/W2091833418","https://openalex.org/W2913077774","https://openalex.org/W4256030018","https://openalex.org/W2145089576","https://openalex.org/W2021253405","https://openalex.org/W1599484045","https://openalex.org/W1986228509","https://openalex.org/W2147400189","https://openalex.org/W2535245920"],"abstract_inverted_index":{"Scan":[0],"based":[1,9,87],"at-speed":[2],"transition":[3,19,55,64,74],"fault":[4,20,56,75],"testing":[5],"of":[6,48,62],"Motorola's":[7],"microprocessors":[8],"on":[10,88],"the":[11,34,41,67,84,89],"PowerPC/spl":[12,90],"trade/":[13,91],"instruction":[14,92],"set":[15,93],"architecture":[16,94],"requires":[17],"broad-side":[18],"test":[21,50,57,76,81],"patterns":[22,51,77],"that":[23,95],"have":[24],"a":[25],"specific":[26],"launch":[27],"and":[28,38,59,78,100],"capture":[29],"clocking":[30],"sequence.":[31],"We":[32],"describe":[33],"concepts":[35],"we":[36,71],"developed":[37],"incorporated":[39],"in":[40],"ATPG":[42,69],"tool":[43],"to":[44,52],"support":[45],"efficient":[46],"generation":[47],"such":[49],"achieve":[53],"high":[54],"coverage":[58,82],"for":[60,83],"analysis":[61],"undetected":[63],"faults.":[65],"Using":[66],"enhanced":[68],"tool,":[70],"generated":[72],"15,000":[73],"achieved":[79],"76%":[80],"MPC7400":[85],"microprocessor":[86],"has":[96],"10.5":[97],"million":[98],"transistors":[99],"runs":[101],"at":[102],"540":[103],"MHz.":[104]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":5}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}