{"id":"https://openalex.org/W2157946367","doi":"https://doi.org/10.1109/vtest.2004.1299242","title":"Detection of temperature sensitive defects using ZTC","display_name":"Detection of temperature sensitive defects using ZTC","publication_year":2004,"publication_date":"2004-06-10","ids":{"openalex":"https://openalex.org/W2157946367","doi":"https://doi.org/10.1109/vtest.2004.1299242","mag":"2157946367"},"language":"en","primary_location":{"id":"doi:10.1109/vtest.2004.1299242","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vtest.2004.1299242","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd IEEE VLSI Test Symposium, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038285814","display_name":"Ethan Long","orcid":null},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"E. Long","raw_affiliation_strings":["IC Design & Test Laboratory, Portland State University, USA"],"affiliations":[{"raw_affiliation_string":"IC Design & Test Laboratory, Portland State University, USA","institution_ids":["https://openalex.org/I126345244"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001994622","display_name":"W.R. Daasch","orcid":null},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"W.R. Daasch","raw_affiliation_strings":["IC Design & Test Laboratory, Portland State University, USA"],"affiliations":[{"raw_affiliation_string":"IC Design & Test Laboratory, Portland State University, USA","institution_ids":["https://openalex.org/I126345244"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040957547","display_name":"R. Madge","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"R. Madge","raw_affiliation_strings":["LSI Logic, Gresham, USA"],"affiliations":[{"raw_affiliation_string":"LSI Logic, Gresham, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083871148","display_name":"Brady Benware","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"B. Benware","raw_affiliation_strings":["LSI Logic, Fort Collins, USA"],"affiliations":[{"raw_affiliation_string":"LSI Logic, Fort Collins, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5038285814"],"corresponding_institution_ids":["https://openalex.org/I126345244"],"apc_list":null,"apc_paid":null,"fwci":0.6583,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.73540638,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"185","last_page":"190"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bounding-overwatch","display_name":"Bounding overwatch","score":0.7023111581802368},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5982856154441833},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5968623161315918},{"id":"https://openalex.org/keywords/temperature-measurement","display_name":"Temperature measurement","score":0.5550119876861572},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.48555299639701843},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.43270447850227356},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41151636838912964},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.4113219380378723},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.39001426100730896},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3315480351448059},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3116338849067688},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25369957089424133},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.20703068375587463},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.14938724040985107},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11131039261817932}],"concepts":[{"id":"https://openalex.org/C63584917","wikidata":"https://www.wikidata.org/wiki/Q333286","display_name":"Bounding overwatch","level":2,"score":0.7023111581802368},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5982856154441833},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5968623161315918},{"id":"https://openalex.org/C72293138","wikidata":"https://www.wikidata.org/wiki/Q909741","display_name":"Temperature measurement","level":2,"score":0.5550119876861572},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.48555299639701843},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.43270447850227356},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41151636838912964},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.4113219380378723},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.39001426100730896},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3315480351448059},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3116338849067688},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25369957089424133},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.20703068375587463},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.14938724040985107},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11131039261817932},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vtest.2004.1299242","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vtest.2004.1299242","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd IEEE VLSI Test Symposium, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.4699999988079071,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1521770013","https://openalex.org/W1704018133","https://openalex.org/W1955440229","https://openalex.org/W1958909498","https://openalex.org/W2021038487","https://openalex.org/W2115908547","https://openalex.org/W2118009298","https://openalex.org/W2129212061","https://openalex.org/W2137926373","https://openalex.org/W2160841000","https://openalex.org/W2165221819","https://openalex.org/W2171702041","https://openalex.org/W4241086456"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W3166204570","https://openalex.org/W3121246613","https://openalex.org/W2170979950","https://openalex.org/W1900707063","https://openalex.org/W2588941787"],"abstract_inverted_index":{"This":[0],"work":[1],"attempts":[2],"to":[3,44,49,78],"improve":[4,50],"the":[5,30,51,80],"common":[6],"understanding":[7],"of":[8],"multiple":[9],"temperature":[10,47],"testing":[11],"by":[12,35,97],"presenting":[13],"previously":[14],"unpublished":[15],"data":[16,61],"as":[17,19,72,74],"well":[18,73],"deriving":[20],"a":[21],"simple":[22],"model":[23,41],"for":[24,64],"bounding":[25],"an":[26],"IC's":[27],"performance":[28],"within":[29],"three":[31],"dimensional":[32],"space":[33],"defined":[34],"VDD,":[36],"frequency,":[37],"and":[38,55,67,90],"temperature.":[39],"The":[40,82],"is":[42,62],"used":[43,85],"design":[45],"new":[46],"screens":[48],"resolution":[52],"between":[53],"healthy":[54],"defective":[56],"ICs.":[57],"Temperature":[58],"based":[59,69],"test":[60,83],"presented":[63],"Scan,":[65],"LBIST,":[66],"TDF":[68],"MinVDD":[70],"measurements":[71],"transistor":[75],"characteristics":[76],"needed":[77],"parameterize":[79],"model.":[81],"vehicles":[84],"are":[86],"0.25":[87],"/spl":[88,92],"mu/m":[89,93],"0.18":[91],"CMOS":[94],"ASICs":[95],"fabricated":[96],"LSI":[98],"logic.":[99]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}