{"id":"https://openalex.org/W4401880697","doi":"https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631530","title":"A Scalable mK Cryo-CMOS Demultiplexer Chip for Voltage Biasing and High-Speed Control of Silicon Qubit Gates","display_name":"A Scalable mK Cryo-CMOS Demultiplexer Chip for Voltage Biasing and High-Speed Control of Silicon Qubit Gates","publication_year":2024,"publication_date":"2024-06-16","ids":{"openalex":"https://openalex.org/W4401880697","doi":"https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631530"},"language":"en","primary_location":{"id":"doi:10.1109/vlsitechnologyandcir46783.2024.10631530","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631530","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084284792","display_name":"Sushil Subramanian","orcid":"https://orcid.org/0000-0002-4733-1398"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sushil Subramanian","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010155013","display_name":"Todor Mladenov","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Todor M Mladenov","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055165524","display_name":"Simon Schaal","orcid":"https://orcid.org/0000-0003-2573-7300"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Simon Schaal","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090892271","display_name":"Bishnu Patra","orcid":"https://orcid.org/0000-0003-1913-1337"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bishnu Patra","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113792327","display_name":"Lester Lampert","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lester Lampert","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109769338","display_name":"Nancy K Robinson","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nancy K Robinson","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110005972","display_name":"J. M. Roberts","orcid":"https://orcid.org/0009-0006-4112-9857"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jeanette Roberts","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065695022","display_name":"Stefano Pellerano","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stefano Pellerano","raw_affiliation_strings":["Intel Corporation,Hillsboro,USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation,Hillsboro,USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5084284792"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":3.036,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.92300102,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10382","display_name":"Quantum and electron transport phenomena","score":0.9836000204086304,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7223202586174011},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.6702150106430054},{"id":"https://openalex.org/keywords/demultiplexer","display_name":"Demultiplexer","score":0.6318603157997131},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5288066864013672},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.5179987549781799},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5170029401779175},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.5133010745048523},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5121304988861084},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4937916696071625},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.45419129729270935},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4381657838821411},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3734261095523834},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.348419725894928},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1990407109260559},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.1868150532245636},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.16682618856430054}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7223202586174011},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.6702150106430054},{"id":"https://openalex.org/C74819829","wikidata":"https://www.wikidata.org/wiki/Q5256428","display_name":"Demultiplexer","level":4,"score":0.6318603157997131},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5288066864013672},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.5179987549781799},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5170029401779175},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.5133010745048523},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5121304988861084},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4937916696071625},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.45419129729270935},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4381657838821411},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3734261095523834},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.348419725894928},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1990407109260559},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.1868150532245636},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.16682618856430054},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsitechnologyandcir46783.2024.10631530","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631530","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7799999713897705}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W4254034712"],"related_works":["https://openalex.org/W2490166672","https://openalex.org/W1988818722","https://openalex.org/W2036457528","https://openalex.org/W2620232004","https://openalex.org/W1966055195","https://openalex.org/W2903804962","https://openalex.org/W2157749706","https://openalex.org/W1978253800","https://openalex.org/W2170979950","https://openalex.org/W2039299085"],"abstract_inverted_index":{"Large-scale":[0],"silicon":[1],"qubit":[2,55,61,83],"control":[3,8,40],"requires":[4],"closer":[5],"integration":[6],"of":[7,16,81],"electronics":[9],"to":[10,20,42,53],"qubits":[11],"at":[12],"the":[13,17,22,64],"mK":[14,28,75],"stage":[15],"dilution":[18],"refrigerator":[19],"address":[21],"wiring":[23],"bottleneck.":[24],"We":[25],"present":[26],"a":[27,59,70,82],"demultiplexer":[29],"chip":[30,62],"that":[31],"uses":[32],"only":[33],"two":[34],"input":[35],"analog":[36],"voltages":[37],"and":[38,47,67],"digital":[39],"signals,":[41],"provide":[43],"both":[44],"DC":[45],"bias":[46],"high-speed":[48],"voltage":[49],"pulsing":[50],"for":[51],"up":[52],"64":[54],"terminals.":[56],"Integrated":[57],"with":[58],"foundry":[60],"on":[63],"same":[65],"PCB":[66],"controlled":[68],"by":[69],"4":[71],"K":[72],"cryo-CMOS":[73],"controller,":[74],"cryogenic":[76],"measurements":[77],"show":[78],"multi-terminal":[79],"characterization":[80],"device.":[84]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":7}],"updated_date":"2025-12-21T01:58:51.020947","created_date":"2025-10-10T00:00:00"}