{"id":"https://openalex.org/W4401881203","doi":"https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631344","title":"First Experimental Demonstration of Hybrid Gain Cell Memory with Si PMOS and ITO FET for High-speed On-chip Memory","display_name":"First Experimental Demonstration of Hybrid Gain Cell Memory with Si PMOS and ITO FET for High-speed On-chip Memory","publication_year":2024,"publication_date":"2024-06-16","ids":{"openalex":"https://openalex.org/W4401881203","doi":"https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631344"},"language":"en","primary_location":{"id":"doi:10.1109/vlsitechnologyandcir46783.2024.10631344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631344","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101976379","display_name":"Shuhan Liu","orcid":"https://orcid.org/0000-0001-5705-565X"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shuhan Liu","raw_affiliation_strings":["Stanford University,Department of Electrical Engineering,California,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stanford University,Department of Electrical Engineering,California,USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050875874","display_name":"Shengjun Qin","orcid":"https://orcid.org/0000-0001-8707-6427"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shengjun Qin","raw_affiliation_strings":["Stanford University,Department of Electrical Engineering,California,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stanford University,Department of Electrical Engineering,California,USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024308803","display_name":"Koustav Jana","orcid":"https://orcid.org/0000-0002-7054-8704"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Koustav Jana","raw_affiliation_strings":["Stanford University,Department of Electrical Engineering,California,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stanford University,Department of Electrical Engineering,California,USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001908351","display_name":"Jian Chen","orcid":"https://orcid.org/0000-0002-1360-8969"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jian Chen","raw_affiliation_strings":["Stanford University,Department of Electrical Engineering,California,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stanford University,Department of Electrical Engineering,California,USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086771285","display_name":"Kasidit Toprasertpong","orcid":"https://orcid.org/0000-0003-4206-8698"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kasidit Toprasertpong","raw_affiliation_strings":["Stanford University,Department of Electrical Engineering,California,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stanford University,Department of Electrical Engineering,California,USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059975258","display_name":"H.\u2010S. Philip Wong","orcid":"https://orcid.org/0000-0002-0096-1472"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H.-S. Philip Wong","raw_affiliation_strings":["Stanford University,Department of Electrical Engineering,California,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stanford University,Department of Electrical Engineering,California,USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":1.4528,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.82109087,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11853","display_name":"Semiconductor materials and interfaces","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.910126805305481},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.6103665828704834},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.5189620852470398},{"id":"https://openalex.org/keywords/memory-cell","display_name":"Memory cell","score":0.5179383158683777},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.5037974715232849},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4888119399547577},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.4811755120754242},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.4258626401424408},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.40512993931770325},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.3757496476173401},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32043492794036865},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.28895750641822815},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.28227078914642334},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.255136638879776},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.18071964383125305},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14201709628105164},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.1165204644203186},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.11509087681770325}],"concepts":[{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.910126805305481},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.6103665828704834},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.5189620852470398},{"id":"https://openalex.org/C2776638159","wikidata":"https://www.wikidata.org/wiki/Q18343761","display_name":"Memory cell","level":4,"score":0.5179383158683777},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.5037974715232849},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4888119399547577},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4811755120754242},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.4258626401424408},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.40512993931770325},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.3757496476173401},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32043492794036865},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.28895750641822815},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.28227078914642334},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.255136638879776},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.18071964383125305},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14201709628105164},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.1165204644203186},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.11509087681770325}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsitechnologyandcir46783.2024.10631344","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsitechnologyandcir46783.2024.10631344","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7200000286102295,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2045976879","https://openalex.org/W2543577874","https://openalex.org/W3134061447","https://openalex.org/W2534660380","https://openalex.org/W3209704453","https://openalex.org/W2128219541","https://openalex.org/W2181574781","https://openalex.org/W2737385822","https://openalex.org/W2013945213","https://openalex.org/W1992635254"],"abstract_inverted_index":{"This":[0],"work":[1],"experimentally":[2],"demonstrates":[3],"hybrid":[4,33],"gain":[5,34,85],"cell":[6,35,86],"memory":[7,36],"with":[8],"Si":[9,27,56,106],"PMOS":[10,28,57,107],"as":[11,17,29],"read":[12,31,42],"transistor":[13,19],"and":[14,50,65,78,108],"ITO":[15,68,109],"FET":[16,69,110],"write":[18],"integrated":[20],"monolithically":[21],"on":[22],"the":[23,30,38,66],"same":[24],"chip.":[25],"With":[26],"transistor,":[32],"has":[37,58,70],"benefits":[39],"of":[40,60,90,100],"high":[41],"speed,":[43],"counterbalanced":[44],"capacitive":[45],"coupling,":[46],"optimized":[47],"state":[48],"allocation,":[49],"superb":[51],"bias":[52,114],"stress":[53,115],"stability.":[54],"Fabricated":[55],"mobility":[59],"86.4":[61],"cm<sup":[62],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[63,73],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>/Vs":[64],"ALD":[67],"positive":[71],"V<inf":[72],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">TH</inf>":[74],"=":[75,81],"0.75":[76],"V":[77],"excellent":[79],"SS":[80],"65":[82],"mV/dec.":[83],"Hybrid":[84],"shows":[87],"measured":[88],"retention":[89],"5,000":[91],"sec":[92,113],"under":[93,111],"OV":[94],"WWL":[95],"standby":[96,117],"voltage.":[97],"Excellent":[98],"stability":[99],"<":[101],"12":[102],"mV":[103],"shift":[104],"for":[105],"1,000":[112],"in":[116],"mode":[118],"is":[119],"achieved.":[120]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":5}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}